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PPTL (propositional projection temporal logic) symbolic model checking method

A technology of symbolic models and detection methods, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve the problems of insufficient description ability of sequential logic language, state space explosion, etc., to reduce space and time complexity, improve The effect of scale and efficiency improvement

Active Publication Date: 2014-07-23
XIDIAN UNIV
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0007] The present invention mainly aims at the problem of the state space explosion caused by too many concurrent execution components in the system model to be verified and the insufficient description ability of the existing sequential logic language in the existing model detection method, and proposes an efficient, concise, compact state space, and expected PPTL symbolic model detection method with stronger property description ability

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  • PPTL (propositional projection temporal logic) symbolic model checking method
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  • PPTL (propositional projection temporal logic) symbolic model checking method

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Embodiment 1

[0062] The present invention is a kind of PPTL symbol model detection method, see figure 1 , use the specification language PPTL with complete regular expression ability to describe the expected properties of the system to be verified; use the Kripke structure M=(S, R, L) to describe the system model to be verified, and use the state set S of the model M and the migration relationship R Boolean variables are encoded, and then the encoded Boolean formula is represented by ROBDD. With the help of ROBDD's compressed storage and effective Boolean formula operation mechanism, the system model M to be verified is efficiently searched. The system to be verified is also called the system to be tested. The state space S is also called the state set S.

[0063] The specific steps of PPTL symbol model detection include:

[0064] Step 1: Firstly, the system to be verified is modeled, and the Kripke structure is used to describe the model M=(S, R, L), and the state set S and the transitio...

Embodiment 2

[0107] PPTL symbol model detection method is the same as embodiment 1, see figure 1 , the present invention is a PPTL symbolic model detection method, which rewrites the expected property formula Q described by PPTL into its regular form, denoted as NF Q , and construct a fully regular graph G of Q Q , using the state set S and the transition relation R symbolized by the Boolean formula, the Boolean code of the state set satisfying the desired property formula Q is efficiently calculated by means of ROBDD.

[0108] Calculate the Boolean code B of the set of states satisfying the desired property formula Q described in PPTL Q The specific steps include:

[0109] Step 3.1: Define the regular form of the desired property formula Q. For any desired property formula Q described in PPTL, the regular form of Q is defined as: where Q P is the set of atomic propositions appearing in Q, l is Q P The number of atomic propositions in , l=|Q p |, n is the disjunctive term Q desc...

Embodiment 3

[0119] PPTL symbol model detection method is the same as embodiment 1~2, see Figure 4 (d)~(k), in the PPTL symbolic model detection method, the regular graph G is marked by constructing the expected property formula P P , and check whether a model that satisfies the desired property formula P exists to determine whether the desired property formula P is satisfiable.

[0120] Construct a labeled regular graph G with the node corresponding to the desired property formula P or a sub-formula of P as the root node P The specific steps include:

[0121] First, the labeled regular graph of the desired property formula P is defined. Labeled Regular Graph G of Expected Property Formula P P is a directed graph, G P =(V(P),E(P),V 0 , L={L 1 , L 2 ,... L m}), where V(P) is a set of nodes, and each node corresponds to a PPTL formula; E(P) is a set of directed arcs, and each edge is recorded as (v P ,P e , v M ), that is, from node v P to node v M There is a state formula P e...

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Abstract

The invention discloses a PPTL (propositional projection temporal logic) symbolic model checking method, belonging to the field of dependable computing. According to the PPTL symbolic model checking method provided by the invention, PPTL symbolic model checking method comprises the steps of using the specification language PPTL with completely regular expression capability to describe the to-be-verified system expectation properties, using the Kripke structure M= (S, R, L) to describe the system model, searching the symbolic system model M by means of ROBDD (reduced ordered binary decision diagram) and constructing a mark regular graph to check up whether the expectation property formula can be satisfied, wherein the follow-up operational time is saved; and the checking efficiency is improved. According to the PPTL symbolic model checking method provided by the invention, the checking complex rate is reduced only based on the detection process of a time sequence operator O; the scale for the model to check the handling problems is improved; the state space explosion problem is effectively relieved; meanwhile, the method has capability of describing state sensible property, sequence property and closure property and can be applied to the fields of industry, agriculture, military affairs, scientific research and the like for detection of design defects of hardware systems, check-up of software systems controlling logical errors and formal verification of communication protocol correctness.

Description

technical field [0001] The invention belongs to the field of trusted computing, and mainly relates to the technical field of system formal modeling and verification, in particular to a propositional projection temporal logic (PPTL) and a symbolic model detection method (SMC), specifically a PPTL symbolic model detection method. It can be applied to the detection of hardware system design defects in the fields of industry, agriculture, military affairs, scientific research, etc., the inspection of software system control logic errors, and the formal verification of the correctness of communication protocols. technical background [0002] In recent years, with the wide application of various computer application software, hardware circuits, embedded systems and network communication protocols in industry, agriculture, military, scientific research and other fields, the complexity of these systems and protocols has increased day by day. The need for reliability continues to inc...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 段振华逄涛田聪王小兵
Owner XIDIAN UNIV
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