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Semiconductor device and manufacturing method of the same

A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of semiconductor chip cutting, cracking, and easy peeling, etc., to suppress peeling and prevent fracture The effect of line defects

Active Publication Date: 2015-06-10
키오시아가부시키가이샤
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, in the conventional chip-on-chip type semiconductor device, when the temperature cycle from low temperature to high temperature is repeated, peeling tends to occur between the side surface of the upper semiconductor chip and the underfill resin constituting the underfill layer.
In addition, the peeling may cause defects such as cracks and propagation in the underfill resin, and the internal wiring of the lower semiconductor chip may be cut.

Method used

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  • Semiconductor device and manufacturing method of the same
  • Semiconductor device and manufacturing method of the same
  • Semiconductor device and manufacturing method of the same

Examples

Experimental program
Comparison scheme
Effect test

no. 1 Embodiment approach

[0017] figure 1 It is a sectional view showing the semiconductor device of the first embodiment.

[0018] figure 1 The illustrated semiconductor device 10 is equipped with a surface ( figure 1 The upper surface of the wiring substrate 1 having a wiring circuit (not shown in the figure), and the semiconductor chip laminate 2 mounted on the surface of the wiring substrate 1 and electrically connected. The semiconductor device 10 is in the form of an FBGA (Fine pitch Ball Grid Array, fine pitch ball grid array) package.

[0019] The semiconductor chip laminated body 2 has a structure as follows: On the first semiconductor chip 2a arranged face up, the second semiconductor chip 2b having a smaller main plane area than the first semiconductor chip 2a has its own circuit surface (element circuit surface). ) are arranged in an opposing manner, and are connected via protrusions 3 . The thicknesses of the first and second semiconductor chips 2a and 2b are both 350 μm or less.

[0...

Embodiment 1~11

[0046] Examples 1-11, Comparative Examples 1-6

[0047] (Underfill Resin A~L)

[0048] First, an epoxy resin was mixed with an inorganic filler (silica powder) having a particle size (average particle size and maximum particle size) shown in Table 1 at a compounding ratio (mass %) shown in the same table, and The curing agents shown in Table 1 were added and mixed to prepare underfill resin materials AA to LL.

[0049] The cured underfill resin materials AA to LL thus obtained, ie underfill resins A to L, Tg, thermal expansion coefficients (CTE1, CTE2) and flexural modulus (25° C.) were determined by TMA. These measurement results are shown in Table 1, respectively. In addition, in the measurement of TMA, a thermomechanical analyzer manufactured by MAC SCIENCE was used.

[0050]

[0051] (manufacturing of semiconductor devices)

[0052] Next, the resin materials AA to LL for forming the underfill resins A to L shown in Table 1 are filled into the gap between the first s...

no. 2 Embodiment approach

[0059] figure 2 It is a sectional view showing the semiconductor device of the second embodiment.

[0060] figure 2 The shown semiconductor device 10 of the second embodiment has a surface ( figure 2 The wiring board 1 has a wiring circuit on the upper surface) and has external connection terminals 7 formed by gold plating or the like on the back surface. On the surface of the wiring board 1, a semiconductor chip stack 2 in which four first to fourth semiconductor chips 2a, 2b, 2c, and 2d are arranged at predetermined intervals is mounted. In addition, the first semiconductor chip 2a, the second semiconductor chip 2b, the third semiconductor chip 2c, and the fourth semiconductor chip 2d have substantially the same principal surface area. In addition, the thicknesses are all 50 μm or less.

[0061] On the surface of the wiring board 1, a connection terminal 1a including a gold plating layer is formed, and a first semiconductor chip 2a, which is the lowermost semiconducto...

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Abstract

A semiconductor device, includes: a wiring substrate, a stacked body mounted on the wiring substrate, an underfill layer filled into gaps between respective semiconductor chips of the stacked body; and a molding body made up of a molding resin covered and formed at outside of the stacked body and so on. The underfill layer is made up of a cured product of a resin material containing an amine-based curing agent, and the cured product has a Tg of 65° C. or more and 100° C. or less.

Description

[0001] This application enjoys the priority of Japanese Patent Application No. 2011-54534 filed on March 11, 2011, and the entire content of this Japanese Patent Application is cited in this application. technical field [0002] Embodiments of the present invention relate to a semiconductor device and a method of manufacturing the semiconductor device. Background technique [0003] In recent years, the development of high-density mounting technology for semiconductor integrated circuits has progressed in response to demands for higher functionality and miniaturization of electronic equipment. As an example of such a mounting technique, there is a chip-on-chip system-in-package technique in which another semiconductor chip is mounted on a semiconductor chip so as to face down. Such a chip-on-a-chip structure is aimed at effectively realizing miniaturization of a semiconductor package, high-speed operation, and power saving. [0004] In a chip-on-chip type structure, connecti...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/065H01L23/31H01L23/29H01L21/98
CPCH01L21/563H01L23/3135H01L24/13H01L24/16H01L24/45H01L24/48H01L24/73H01L24/81H01L24/92H01L25/0657H01L25/50H01L2224/13025H01L2224/13111H01L2224/13139H01L2224/13144H01L2224/13147H01L2224/13155H01L2224/13164H01L2224/1412H01L2224/16145H01L2224/16227H01L2224/32225H01L2224/45144H01L2224/48227H01L2224/73204H01L2224/73207H01L2224/73265H01L2224/81444H01L2224/92125H01L2225/0651H01L2225/06513H01L2225/06517H01L2225/06541H01L2225/06565H01L2225/06568H01L2924/15311H01L2924/15313H01L2924/01019H01L2924/01079H01L2924/01014H01L2924/01028H01L2224/32145H01L2924/10253H01L2224/16225H01L2924/12042H01L2924/181H01L2924/00H01L2924/00012
Inventor 福田昌利渡部博
Owner 키오시아가부시키가이샤