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Display device and array substrate as well as thin film transistor and manufacturing method thereof

A technology of thin film transistors and manufacturing methods, which is applied in the field of display devices, can solve problems such as damaging device stability and affecting product yield, and achieve the effects of improving yield, shortening process time, and avoiding impact

Active Publication Date: 2012-09-19
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0028] The object of the present invention is to provide a display device, an array substrate, a thin film transistor and a manufacturing method thereof, so as to overcome the fact that the hydrogen groups doped in the gate insulating layer in the existing array substrate are easy to damage the stability of the device, resulting in affecting the quality of the product. rate of defects

Method used

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  • Display device and array substrate as well as thin film transistor and manufacturing method thereof
  • Display device and array substrate as well as thin film transistor and manufacturing method thereof
  • Display device and array substrate as well as thin film transistor and manufacturing method thereof

Examples

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Embodiment 1

[0134] Such as image 3 As shown, as an embodiment of the present invention, the thin film transistor provided in the embodiment of the present invention is a thin film transistor structure in which the gate layer is located at the bottom layer. Specifically, the thin film transistor includes: a gate 302a on the substrate 301, a gate insulating layer and an active layer 306a respectively on the gate 302a. Wherein, the active layer 306a is an oxide semiconductor, the gate 302a is copper or a copper alloy, and the gate insulating layer is a single-layer structure, including a first gate insulating layer 303, and the first gate insulating layer 303 is silicon dioxide film, silicon nitride film, silicon oxynitride film, aluminum oxide film or titanium oxide film. The thickness of the first gate insulating layer 303 is 50nm˜500nm.

[0135] In the embodiment of the present invention, besides silicon dioxide film, silicon nitride film, silicon oxynitride film, aluminum oxide film o...

Embodiment 2

[0157] The difference between this embodiment and the first embodiment is that the thin film transistor provided by the embodiment of the present invention is a thin film transistor with a gate layer located on the top layer. Specifically, the thin film transistor includes: an active layer located on the substrate, a gate insulating layer located above the active layer, and a gate located above the gate insulating layer. Specifically, the structure and manufacturing method of the gate insulating layer are the same as those of the gate insulating layer in Embodiment 1, and will not be repeated here.

Embodiment 3

[0159] Such as Figure 5 As shown, the thin film transistor provided by the embodiment of the present invention is a thin film transistor structure in which the gate layer is located at the bottom layer. Specifically, the thin film transistor includes: a gate 312a on the substrate 311, a gate insulating layer and an active layer 316a respectively located above the gate 312a. Wherein, the active layer is an oxide semiconductor, the gate 312a is copper or a copper alloy, and the gate insulating layer is two layers, including a first gate insulating layer 313 and a second gate insulating layer 314, the first gate insulating layer 313 and the second gate insulating layer 314. The 313 layer is close to the gate 312a and is located above the gate. The second gate insulating layer 301 is close to the active layer 316a, wherein the first gate insulating layer 313 is a silicon nitride film or a silicon nitride oxide film, and the second gate insulating layer 301 is close to the active ...

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Abstract

The invention relates to the technical field of display and particularly relates to a display device and an array substrate as well as a thin film transistor and a manufacturing method of the thin film transistor. The thin film transistor comprises a grid electrode, an active layer and a grid electrode insulating layer located between the grid electrode and the active layer, wherein the active layer is an oxide semiconductor; and the grid electrode insulating layer comprises at least one layer of an inorganic insulating thin film. According to the display device and the array substrate as well as the thin film transistor and the manufacturing method of the thin film transistor disclosed by the invention, the grid electrode insulating layer in the thin film transistor is subjected to an annealing process, or a layered structure is combined with the annealing process or the layered structure can reduce radicals containing hydrogen in the grid electrode insulating layer to the greatest extent, so that the influences on the oxide semiconductor by the radicals containing the hydrogen are effectively avoided, the stability of a whole TFT (Thin Film Transistor) device is improved and the yield of a final product is improved.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a display device, an array substrate, a thin film transistor and a manufacturing method thereof. Background technique [0002] Oxide thin-film transistor (Oxide TFT) has the advantages of ultra-thin, light weight, and low power consumption. It can not only be used in the manufacture of liquid crystal display panels, but also for the production of a new generation of organic light-emitting display panels with brighter colors and clearer images. OLED (Organic Light-Emitting Diode, Organic Light-Emitting Diode) is available in the practical stage. [0003] refer to figure 1 , Figure 2A ~ Figure 2E , the manufacturing method of the oxide TFT array substrate in the prior art will be described. [0004] figure 1 It is a block flow diagram of the manufacturing method of the existing Oxide TFT array substrate, Figure 2A ~ Figure 2F It is a cross-sectional view during the ...

Claims

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Application Information

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IPC IPC(8): H01L29/786H01L21/336H01L27/12
CPCH01L29/4908H01L29/66742H01L29/7869H01L29/66969H01L29/40114H01L29/51H01L29/42384H01L2029/42388
Inventor 袁广才李禹奉
Owner BOE TECH GRP CO LTD
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