Low dropout regulator (LDO)

Abstract

The embodiment of the invention discloses a low dropout regulator (LDO). The LDO comprises an operational amplifier, a first metal oxide semiconductor (MOS) tube, a first feedback resistor, a second feedback resistor and a pole circuit, wherein the inverting input end of the operational amplifier is connected with reference voltage; the output end of the operational amplifier is connected with a grid of the first MOS tube; a source of the first MOS tube is connected with a voltage input end; a drain of the first MOS tube is connected with a voltage output end and the second feedback resistor; a common node formed after the first feedback resistor and the second feedback resistor are connected in series is connected with the non-inverting input end of the operational amplifier; the first feedback resistor is grounded; and the pole circuit is connected between the operational amplifier and the voltage output end and used for reducing high-frequency gain on a signal path from the voltage input end to the voltage output end and improving the power supply rejection ratio (PSRR) performance of the LDO at high frequency. The PSRR performance of the LDO can be obviously improved on the premise that cost is low and circuit area and power consumption are slightly increased.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a low-dropout linear regulator. Background technique [0002] In integrated circuits, the ripple and noise on the input power supply will often have a harmful effect on the performance of the circuit, so in some circuits that are sensitive to input power supply ripple or noise, it is often first passed through the low dropout linear regulator. (Low Dropout Regulator, LDO) obtains an input power supply with less ripple or noise, and then uses this newly generated input power supply to power the circuit, so as to ensure that the performance of the circuit is not affected. However, in an actual circuit, some of the ripple or noise on the input power supply will still leak to the output voltage. In order to measure the ability of the LDO to suppress the ripple or noise of the input power supply, the power supply rejection ratio (Power Supply Rejection Ratio, PSRR) is introduced. )...

AI Technical Summary

Problems solved by technology

In an integrated circuit, the filter capacitor can be set inside the chip or outside the chip. When it is set inside the chip, because the value of the filter capacitor is often relatively large, it will consume a large chip area, thereby increasing the cost of the chip; , the output of the LDO must be led to the outside of the chip through the pins of the chip, and the filter capacitor is realized by an external independent device, which will significantly increase the system cost

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