Method for improving uniformity of shallow trench isolation chemical-mechanical planarization

Abstract

The invention discloses a method for improving uniformity of shallow trench isolation (STI) chemical-mechanical planarization (CMP). The method comprising: performing deposition to form silicon oxide isolated layer in a shallow trench, the silicon oxide isolated layer having a projecting part and a sunken part; performing ion implantation to change crystalline state of the projecting part; performing chemico-mechanical polishing on the silicon oxide isolated layer until a stop layer is exposed. According to the method for improving uniformity of shallow trench isolation chemical-mechanical planarization, the ion implantation and a silicon oxide CMP process are combined. Through performing ion implantation on silicon oxide of the projecting part, the projecting part's silicon oxide material removing rate of CMP grinding liquid is increased. In a STI CMP process, a purpose of reducing oxide layer thickness gap of the shallow trench's isolation area and non-isolation area is achieved, the oxide layers being disposed on the shallow trench's isolation area and non-isolation area, thereby improving planarization and uniformity of the STI CMP process and reducing sunken and defective degree.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor device, in particular to a method for improving the chemical mechanical planarization uniformity of shallow trench isolation. Background technique [0002] Since the introduction of shallow trench isolation (STI) technology from the 0.25um technology node, high-density isolation of devices has become possible. As technology nodes continue to shrink, in order to improve device density and isolation effects, the aspect ratio (AR) of the shallow trench itself increases accordingly. High-density plasma chemical vapor deposition (HDP-CVD) is the mainstream technique for filling shallow trenches. Through the cyclic process of deposition and etching, this technology overcomes the possible sealing problem at the top of the trench and completes the filling of the large AR trench structure. The effect after silicon oxide filling is shown in the appendix figure 1 . Among them, a pad oxide laye...

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Problems solved by technology

Due to the large silicon oxide thickness drop ( figure 1 The height difference of the top of the silicon oxide layer 3 is, for example, ), in the STI CMP process, this thickness difference cannot be eliminated directly by the CMP process, and will be inherited until the end of the CMP process, causing part of the silicon oxide in the shallow trench to be worn away, forming a dishing defect, and causing the electrical performance of the device drop, or even yield reduction, see attached figure 2

[0004] All in all, when the current HDP-CVD fills the STI with high AR, the large silicon oxide thickness difference reduces the CMP uniformity and causes device defects

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