nLDMOS (Laterally Diffused Metal Oxide Semiconductor) device with ESD (electronic static discharge) protection function

Abstract

An nLDMOS (Laterally Diffused Metal Oxide Semiconductor) device with an ESD (electronic static discharge) protection function belongs to the field of electronic technique. A P trap and an N trap for manufacturing a low-voltage device are introduced between the drift region and the drain electrode contact region of a conventional nLDMOS device, and the ESD current is enabled to flow through the deeper region of the device, so that the peak power density under ESD stress is reduced, the current is prevented from centralizing in the surface of the device, the uniformity on heat dissipation of the device is improved on the basis of greatly improving the reliability of the beak position of a drain terminal, and the ESD protection capacity of the device is accordingly improved. The nLDMOS device with the ESD protection function is compliable with the techniques of Bipolar CMOS (Complementary Metal-Oxide-Semiconductor Transistor) and DMOS (Double Diffusion Metal-Oxide-Semiconductor), and the cost of the device is not remarkably increased.

Description

technical field [0001] The invention belongs to the field of electronic technology, and relates to the electrostatic discharge (ElectroStatic Discharge, referred to as ESD) protection circuit technology of semiconductor integrated circuit chips, especially an n-channel lateral double-diffusion MOSFET (n-channel Lateral Double-Diffusion MOSFET) for ESD protection. Diffusion MOSFET, referred to as nLDMOS) structure. Background technique [0002] Electrostatic discharge is a common phenomenon in the process of manufacturing, production, assembly, testing and transportation of integrated circuit devices or chips. Electrostatic discharge can cause chip performance degradation or direct damage. According to statistics, ESD damage accounts for as high as 30% of chip damage. Therefore, improving the anti-ESD capability of integrated circuits has very important practical significance. [0003] The essence of ESD failure can be high power or large electric field. The former causes ...

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Problems solved by technology

[0004] Unlike low-voltage MOS devices, due to the limitation of withstand voltage, ordinary high-voltage MOS devices will have a drift region Ndrift (such as figure 1 shown), the doping concentration of this drift region is low and the length is relatively long

However, since LDMOS is a surface-type device, the Kirk effect usually occurs on the device under ESD stress, and the large electric field and large current are usually concentrated in the bird's beak area at the junction of the thick oxide layer and the active area, and the peak power density is too large, resulting in A lot of heat is easy to burn the device

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