Low-power dissipation static random access memory (SRAM) type field programmable gate array (FPGA) design method

Abstract

Provided is a low-power dissipation static random access memory (SRAM) type field programmable gate array (FPGA) design method. A level shifter is used for at least reducing working voltage of a two-dimensional logical block array of the FPGA to a near-threshold, the Schmidt trigger type SRAM is adopted in a look up table (LUT) in the two-dimensional logical block array, a sub-threshold D latch is adopted in a programmable D-flip flop, the LUT and the programmable D-flip flop work under reduced low supply voltage, and therefore the FPGA works normally under ultra-low supply voltage. The invention provides the novel method. According to the method, the level shifter is used for reducing the working voltage of the two-dimensional logical block array of the FPGA to be in a near-threshold or even a sub-threshold area, the FPGA can work normally under the ultra-low supply voltage, and therefore the FPGA can further achieve work of ultra-low power dissipation.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, relates to a field programmable gate array FPGA, in particular to a low-power FPGA working under the condition of an ultra-low power supply voltage, and is a design method of a low-power SRAM FPGA. Background technique [0002] FPGA (Field Programmable Gate Array), that is, Field Programmable Gate Array, is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It appears as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of gate circuits of original programmable devices, and makes it fast to market and low design cost. They play an increasingly important role in the field of complex logic circuits and digital signal processing. Among them, SRAM-type FPGA has received more and more favors...

AI Technical Summary

Problems solved by technology

Although the current mainstream SRAM-based FPGA is more and more integrated and its technology is more and more advanced, because its leakage current is equal to or even exceeds the working current of FPGA with the improvement of technology, it has become a bottleneck for FPGA to achieve low power consumption.

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