Wafer back face thinning method
A backside thinning and wafer technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as excessive thickness, increased internal stress, and slow thinning rate, so as to reduce the probability of fragmentation and increase the number of finished products rate, reducing the effect of internal stress
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[0027] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.
[0028] Such as figure 2 Shown is the prior art process flow chart, comprises the following steps:
[0029] Step S01, bonding the device wafer to the carrier;
[0030] Step S02, performing a second grinding on the back of the device wafer, and grinding the thickness of the device wafer to 50um-25um;
[0031] Step S03, performing a second wet etching on the device wafer, and etching the device wafer to 8um-6um;
[0032] Step S04, performing a third wet etching on the device wafer to etch away the remaining device wafer body substrate 3;
[0033] In step S05, the device wafer is wet-etched to 5.4um for the fourth time.
[0034] The present invention adopts the process of multi-step grinding and etching. The more t...
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