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TFT-LCD array substrate, display panel and manufacturing method thereof

A technology for array substrates and manufacturing methods, applied in the field of TFT-LCD array substrates, can solve problems such as alignment deviation, decrease in aperture ratio, increase black matrix, etc., and achieve the effects of reducing equipment investment, reducing production costs, and increasing transmittance

Active Publication Date: 2016-04-13
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in the actual process, alignment deviation may occur, resulting in light leakage in the edge area of ​​the pixel, so it is generally necessary to widen the black matrix, but the widening of the black matrix will lead to a decrease in the aperture ratio
[0004] From Figure 1(a)-Figure 1(b) and figure 2 It can be seen from the figure that in the existing process, the black matrix is ​​usually made on the color filter substrate, which will affect the overall flatness of the color filter substrate on the one hand.
On the other hand, due to the deviation between the array substrate and the color filter substrate, the width of the black matrix needs to be increased, thereby reducing the aperture ratio of the TFT-LCD display

Method used

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  • TFT-LCD array substrate, display panel and manufacturing method thereof
  • TFT-LCD array substrate, display panel and manufacturing method thereof
  • TFT-LCD array substrate, display panel and manufacturing method thereof

Examples

Experimental program
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Embodiment 1

[0037] Fig. 3(a) - Fig. 3(b) are schematic plan view and cross-sectional view of the array substrate provided by the present invention. The array substrate includes a plurality of gate lines and a plurality of data lines formed on the base substrate 11, so The plurality of gate lines and the plurality of data lines define a plurality of pixel units, and the pixel units include a pixel electrode layer 30 and a thin film transistor. The thin film transistor device includes a gate 12, a gate insulating layer 13, an active layer, a source 16, a drain 17, a passivation layer 20, a via hole 19, etc. formed on a substrate 11, wherein the active layer includes a semiconductor layer 14 and doped semiconductor layer 15.

[0038] Wherein, the passivation layer 20 is made of black insulating material, and the passivation layer 20 is provided with an opening in the pixel display area (ie, the pixel electrode layer 30 ) of the array substrate. The passivation layer 20 covers the gate lines...

Embodiment 2

[0044] This embodiment provides a display panel, including the array substrate as described in Embodiment 1. The display panel further includes a color filter substrate, and a liquid crystal layer located between the array substrate and the color filter substrate, wherein the color filter substrate includes a color filter layer and does not include a black matrix. Since the passivation layer of the array substrate in the present invention is made of black insulating material and a black matrix is ​​formed on the array substrate, the color filter substrate in the display panel of the present invention may not be provided with a black matrix. Of course, in the display panel of the present invention, the array substrate in Embodiment 1 and the color filter substrate provided with the black matrix in the prior art can also be used to form a cell to prepare a liquid crystal panel. In this embodiment, the color filter substrate includes a color filter layer, but no black matrix is ​...

Embodiment 3

[0049] This embodiment provides a method for fabricating an array substrate, such as Figure 5 As shown, the method includes:

[0050] S11, forming thin film transistors, gate lines, and data lines on the base substrate;

[0051] S12. Form a black passivation layer thin film on the substrate after completing the preceding steps, and form a black passivation layer pattern through a patterning process. The black passivation layer pattern covers gate lines, data lines and thin film transistors, and the black passivation layer is in The pixel display area is provided with an opening.

[0052] Wherein, said step S11 further includes the following steps:

[0053] S101, depositing a gate metal thin film on the base substrate, and forming a pattern including a gate and a gate line through a patterning process;

[0054] S102, forming a gate insulating layer on the substrate after the aforementioned steps;

[0055] S103. Deposit a semiconductor thin film, a doped semiconductor thin ...

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Abstract

Embodiments of the disclosure provide an array substrate and a fabrication method thereof, and a display panel and a fabrication method thereof. A passivation layer of the array substrate is made of a black insulation material and the passivation layer is provided with an opening at a pixel display region of the array substrate. The passivation layer is simultaneously used as a black matrix, and thus the aperture ratio of the display panel is effectively increased.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a TFT-LCD array substrate, a display panel and a manufacturing method thereof. Background technique [0002] Thin film transistor liquid crystal display (TFT-LCD) is currently the mainstream product in the display field. A liquid crystal display in the prior art includes an array substrate, a color filter substrate, and a liquid crystal layer located between the array substrate and the color filter substrate. Among them, the structure of the color filter substrate (also known as color filter, ColorFilter, CF for short) is shown in Fig. The color filter layer 43 (generally includes a red filter unit, a green filter unit, and a blue filter unit), and a columnar spacer 50 . The black matrix (BlackMatrix) is mainly to prevent light leakage between pixels, prevent color mixing, increase color purity and color contrast. The structure of the corresponding array substrate (also known...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G02F1/1362G02F1/1368G02F1/1335G02F1/1333H01L21/77
CPCG02F1/133512G02F1/136209G02F1/133357H01L27/1248H01L29/78633G02F1/1368H01L27/1262
Inventor 姜晶晶李圭鉉黎敏王耸
Owner BOE TECH GRP CO LTD