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Manufacturing method of semiconductor device

A manufacturing method and semiconductor technology, which can be used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as difficulty and difficulty in controlling the number of graphene layers, and achieve the effect of improving electrical performance

Active Publication Date: 2013-06-19
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, it is very difficult to form graphene on a silicon substrate, because it is difficult to control the number of layers of graphene formed on a silicon substrate by a traditional chemical vapor deposition process, and graphene with a multilayer structure is difficult to embody Excellent electrical properties mentioned above

Method used

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  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device

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Embodiment Construction

[0029] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0030] In order to thoroughly understand the present invention, detailed steps will be provided in the following description, so as to explain the method for forming a Fin-shaped channel of a FinFET device proposed by the present invention. Obviously, the practice of the invention is not limited to specific details familiar to those skilled in the semiconductor arts. Preferred embodiments of the present invention are described in detail below, however, the present invention may have other embodiments besides these detailed descriptions.

[0031] It should be u...

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Abstract

The invention provides a manufacturing method of a semiconductor device. The manufacturing method of the semiconductor device comprises proving a semiconductor substrate, forming a dielectric layer on the semiconductor substrate, and etching the dielectric layer to enable the dielectric layer to be fin-shaped; forming a sacrificial layer on the semiconductor substrate to cover the fin-shaped dielectric layer; etching the sacrificial layer to form side wall bodies on two sides of the fin-shaped dielectric layer; carrying out hydrogen annealing on the side wall bodies to form metal layers on two sides of the fin-shaped dielectric layer; forming graphene layers on the metal layers to cover the metal layers; and carrying out dehumidification and evaporation processing on the metal layers to achieve peeling between the graphene layers and the metal layers. According to the manufacturing method of the semiconductor device, fin-shaped channels comprising graphene with a single-layer structure can be formed, and thus electrical properties of FinFet devices are improved.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for forming a Fin-shaped channel of a FinFet device. Background technique [0002] With the continuous shrinking of the channel size, the fin field effect transistor (FinFet) is increasingly recognized by semiconductor manufacturers as the first choice for the semiconductor manufacturing process of 22nm and below nodes, because it can better adapt to the device size. Requirements for scaling down. [0003] The prior art usually adopts the following process steps to form the fin (Fin)-shaped channel of the FinFet device: first, a buried oxide layer is formed on the silicon substrate to make a silicon-on-insulator (SOI) structure; then, the silicon-on-insulator A silicon layer is formed on the (SOI) structure, and the silicon layer can be single crystal silicon or polycrystalline silicon; then, the silicon layer is patterned, and the patterned silicon layer is etch...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336
Inventor 张海洋王新鹏
Owner SEMICON MFG INT (SHANGHAI) CORP