Convex point packaging structure and technique of horizontal chip of firstly-etched and then-packaged three-dimensional system level
A system-level chip, etch first and then seal technology, which is applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., can solve the problems of not being able to embed chips, limiting the integration of packaging functions, etc.
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Embodiment 1
[0207] Embodiment 1, single-layer line single-chip front-mounted single-turn pins
[0208] see Figure 31 , is a structural schematic diagram of Embodiment 1 of the three-dimensional system-on-a-chip front-mounted bump package structure of the present invention, which includes a base island 1 and pins 2, and the front and back sides of the base island 1 are bonded by conductive or non-conductive The substance 3 is respectively provided with a first chip 4 and a second chip 5, the fronts of the first chip 4 and the second chip 5 are respectively connected with the front and the back of the pin 2 with a metal wire 6, and the lead The front of pin 2 is provided with conductive pillars 7, the area around the base island 1, the area between base island 1 and pin 2, the area between pin 2 and pin 2, the upper part of base island 1 and pin 2 The area of the base island 1 and the lower part of the pin 2, as well as the first chip 4, the second chip 5, the metal wire 6 and the condu...
Embodiment 2
[0270] Embodiment 2, multi-turn single-chip formal installation + passive components + electrostatic discharge ring
[0271] see Figure 32 , is a structural schematic diagram of Embodiment 2 of the three-dimensional system-on-chip front-mounted bump package structure of the present invention. The difference between Embodiment 2 and Embodiment 1 is that the conductive pillar 7 has multiple turns, and the pin 2 and the pin 2 are connected to the passive device 10 through a conductive adhesive substance, and an electrostatic discharge ring 14 is arranged between the base island 1 and the pin 2, and the back surface of the electrostatic discharge ring 14 is connected to the second chip 5 The fronts are connected by metal wires 6, and the passive device 10 can be connected between the back of the pin 2 and the front of the pin 2, or between the back of the pin 2 and the back of the electrostatic discharge ring 14, or Bridged between the back of the base island 1 and the back of t...
Embodiment 3
[0272] Embodiment 3, single-circle multi-base island tiling multi-chip formal installation
[0273] see Figure 33 , is a structural schematic diagram of Embodiment 3 of the three-dimensional system-on-a-chip front-mount bump package structure of the present invention, the difference between Embodiment 3 and Embodiment 1 is that there are multiple base islands 1, and The back of the island 1 is provided with a second chip 5 through a conductive or non-conductive adhesive substance 3 , and the front of the second chip 5 is connected with the front of the second chip 5 through a metal wire 6 .
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