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The removal method of the pmos replacement gate of the cmos tube

A technology to replace the gate and gate oxide layer, which is applied in the fields of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., and can solve the problems of loss of photoresist, inability to completely remove PMOS replacement gate, etc.

Active Publication Date: 2016-11-02
SEMICON MFG INT (SHANGHAI) CORP
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  • Description
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Problems solved by technology

[0012] from Figure 1d It can be seen that during the process of removing the PMOS replacement gate, there is still photoresist. Since the removal of the PMOS replacement gate is performed by dry etching, part of the photoresist will also be lost, resulting in a large amount of polymer that adheres to the PMOS replacement gate. The position of the gate makes it impossible to completely clear the PMOS replacement gate, which means that this will cause Figure 1d The position where the PMOS replacement gate is removed is not a vertical trench, but has a certain slope. The entire trench is in the shape of a narrow top and a wide bottom, so that it is not easy to fill the PMOS metal gate electrode in the trench with this shape later. Material

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  • The removal method of the pmos replacement gate of the cmos tube
  • The removal method of the pmos replacement gate of the cmos tube
  • The removal method of the pmos replacement gate of the cmos tube

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[0033] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0034] The flow chart of the method for removing the PMOS replacement gate of the CMOS transistor in the present invention is as follows figure 2 As shown, it includes the following steps:

[0035] Step 21, see Figure 2a , with the shallow trench isolation region 101 as the boundary on the semiconductor substrate 100, a first region with a PMOS structure and a second region with an NMOS structure are formed; both the PMOS structure and the NMOS structure at least include sequentially forming on the surface of the semiconductor substrate The high dielectric constant gate oxide layer 102 and the replacement gate 103, and the active regions (not shown in the figure) located on both sides of the replacement gate and in the semiconductor substrate;

[00...

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Abstract

The invention discloses a method of removing a PMOS replacement gate of a CMOS transistor. The STI structure on a semiconductor substrate is used as a boundary to form a first area in the PMOS structure and a second area in the NMOS structure; an etching termination layer and an interlayer dielectric layer are sequentially deposited on the surface of the areas; the interlayer dielectric layer is subjected to chemical mechanical polishing which is performed until the etching termination layer, and replacement gates of the PMOS structure and NMOS structure are exposed; a hard mask layer is deposited; the second area is blocked with a photoresist layer, and the hard mask layer on the surface of the PMOS structure is opened to expose the PMOS replacement gate; the photoresist layer is removed by two steps; in the first step, the photoresist layer is treated with oxygen-bearing gas; in the second step, the residual photoresist layer is removed with nitrogen or the combination of nitrogen and hydrogen; the PMOS replacement gate is removed from the buried interlayer dielectric layer. The method has the advantages that polymers are avoided generating during the removal process of the PMOS replacement gate.

Description

technical field [0001] The invention relates to the manufacturing technology of semiconductor devices, in particular to a method for removing a PMOS replacement gate of a CMOS transistor. Background technique [0002] At present, in the manufacturing process of semiconductor devices, P-type metal-oxide-semiconductor (PMOS) transistors, NMOS transistors, or complementary metal-oxide-semiconductor (Complementary Metal-Oxide-Semiconductor, CMOS) composed of PMOS transistors and NMOS transistors Tubes become the basic devices that make up chips. [0003] In order to control the short channel effect, smaller device size requires a further increase in the gate electrode capacitance. This can be achieved by continuously reducing the thickness of the gate oxide layer, but this is accompanied by an increase in gate electrode leakage current. When silicon dioxide is used as the gate oxide layer and the thickness is below 5.0nm, the leakage current becomes unbearable. The way to sol...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8238H01L21/027
CPCH01L21/823857
Inventor 张海洋李凤莲
Owner SEMICON MFG INT (SHANGHAI) CORP