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A Switchable Error Recovery Method Based on On-Chip Monitoring

An error recovery and error switching technology, applied in the direction of response error generation, concurrent command execution, machine execution device, etc., can solve problems such as low throughput rate, unsatisfactory power consumption benefit, limited system application occasions, etc., to overcome the scope of application small effect

Inactive Publication Date: 2018-05-15
JIANGSU SEUIC TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It solves the problems of single error recovery method, system application limitations, low throughput and unsatisfactory power consumption gains in a relatively wide operating frequency range

Method used

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  • A Switchable Error Recovery Method Based on On-Chip Monitoring
  • A Switchable Error Recovery Method Based on On-Chip Monitoring
  • A Switchable Error Recovery Method Based on On-Chip Monitoring

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Embodiment Construction

[0019] In order to make the technical means, creative features, goals and effects achieved by the present invention easy to understand, the present invention will be further described below in conjunction with specific embodiments.

[0020] Such as figure 1 As shown, the present invention includes a pipeline structure CPU core and an error recovery unit 7 . The specific structure of the error recovery unit 7 is as follows: figure 2 As shown, it includes an on-chip monitoring unit circuit 1, an error signal statistics module 2, a power management module 3, an error recovery control module 4, an in-place error recovery module 5 and an upper layer error recovery module 6. The on-chip monitoring unit circuit 1 sends the monitored error signal to the error signal statistics module 2, and the error rate counted by the error signal statistics module 2 and the system status of the power management module 3 are sent to the error recovery control module 4, and the error recovery contr...

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Abstract

The invention relates to a switchable error recovery method based on on-chip timing monitoring, which includes an on-chip monitoring unit circuit, an error signal statistics module, a power management module, an error recovery control module, an in-situ error recovery module and an upper layer error recovery module. In the process of the method, the error signal statistical module counts the error rate monitored by the on-chip monitoring unit circuit, and sends the statistical result to the error recovery control module. The error recovery control module selects the in-situ error recovery mode or the upper layer error recovery mode after calculation and comparison according to the error rate and the current working state of the circuit sent by the power management module. At the same time, the error recovery control module sends the voltage frequency adjustment signal to the power management module, the power management module dynamically adjusts the working state of the system. When the operating frequency of the system is relatively low, the system can be recovered from the error state as soon as possible by using the in-place error recovery method (note: only one clock tick is stopped).

Description

technical field [0001] The invention relates to a switchable error recovery method based on on-chip monitoring, in particular to a switchable error recovery method based on on-chip error monitoring and according to the monitoring results, and belongs to the field of integrated circuit design. Background technique [0002] With the continuous shrinking of transistor size, the number of integrated transistors per unit area has increased sharply, and the power consumption of integrated circuits has become an equally important consideration as function and area. The dynamic adjustment technology aimed at reducing the power consumption of the circuit has gradually become an important low power consumption technology because of its remarkable effect. [0003] The dynamic voltage and frequency adjustment technology based on on-chip monitoring that has emerged in recent years attributes the changes in circuit working conditions, such as temperature, process, and noise, to the timing...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/07G06F9/38
Inventor 单伟伟朱肖王学香孙华芳蔡志匡
Owner JIANGSU SEUIC TECH CO LTD