A method of manufacturing a semiconductor device

Abstract

The invention provides a method for manufacturing a semiconductor device, and relates to the technical field of semiconductors. The method comprises the following steps: after a germanium-silicon forming process, etching a germanium-silicon shielding layer and a pseudo grid hard mask in an NMOS (N-Channel Metal Oxide Semiconductor) region so as to enable the thicknesses of the germanium-silicon shielding layers and the pseudo grid hard masks in the NMOS region and a PMOS (P-Channel Metal Oxide Semiconductor) region to be the same. Through the adoption of the method, the problem that the thicknesses of the germanium-silicon shielding layers and the pseudo grid hard masks in the NMOS region and the PMOS region are not uniform before the removal process is solved, good removal of the germanium-silicon shielding layer and the grid hard mask can be achieved under the condition that no large over-etching amount is needed, the problem that silicon nickel cannot be grown at the top of the NMOS region because of silicon nitride residue at the top of the NMOS region particular large NMOS region is avoided, device badness of pseudo grid top end side wing defects and defects of an AA (Acrylic Acid) region are avoided, the phenomenon of abnormal silicon nickel growth at the shoulder of the pseudo grid caused by the pseudo grid defects is avoided, and the product yield is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a semiconductor device. Background technique [0002] In the field of semiconductor technology, for the advanced polysilicon / silicon oxynitride technology below the 45nm node, stress engineering has become one of the most important factors for device performance improvement. For PMOS, silicon germanium technology can improve carrier mobility by applying compressive stress to the channel. In the prior art, generally, dry etching combined with wet etching is used to form PMOS grooves (which may be sigma type or U type, etc.) for depositing silicon germanium. In the process of forming the groove by dry etching, the part of the silicon-germanium masking layer (i.e. SiGeblockfilm) located in the PMOS area (ie, the silicon-germanium masking layer in the PMOS area, or the temporary spacer in the PMOS area) will be etched away at the same time. The par...

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Problems solved by technology

[0016] It can be seen that if the amount of over-engraving process is too large or too small, it will lead to defective devices.

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