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Improved differential-architecture SONOS flash storage unit

A storage unit and differential technology, applied in the field of improved differential architecture SONOS Flash storage unit, to achieve the effect of expanding the distinguishable current and good impedance matching

Inactive Publication Date: 2014-04-23
SUZHOU KUANWEN ELECTRONICS SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The purpose of the present invention is to overcome the above problems existing in the prior art, and to provide an improved differential architecture Flash storage unit. On the basis of a traditional single SONOS storage unit, two branches are used to compare the input differential amplifier during reading, avoiding the Using the mismatch problem caused by the reference circuit greatly improves the stability of reading

Method used

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Embodiment

[0024] In the erasing state, a voltage of -8V is applied to the WL of the storage cell, and a voltage of about 6V is applied to the substrates of M1 and M2. According to the principle of FN tunneling, the electrons that have been trapped in the nitride layer will pass through the potential barrier After reaching the source, after there are no electrons in the nitride layer, it means that the information has been erased.

[0025] In the programming state, 8-12V voltage is applied to WL of the memory cell, 3-6V voltage is connected to SL1, SL2 is grounded, and BL1 and BL2 are also grounded. At this time, M1 on the left works, using the channel hot electron injection principle, electrons are injected into the nitride layer of M1, that is, data 0 is written, and the branch M2 on the right also works, but because both BL2 and SL2 are grounded, the electrons are not The nitride layer implanted into M2, that is, M2 remains in its original state, which is equivalent to being written w...

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Abstract

The invention discloses an improved differential-architecture SONOS flash storage unit which comprises two identical SONOS transistor M1 and M2, wherein gate electrodes of M1 and M2 are connected as a word line of the whole storage unit; drain electrodes of M1 and M2 are respectively connected with two source lines SL1 and SL2 of the storage unit; and source electrodes of M1 and M2 are respectively used as tow bit lines BL1 and BL2 of the storage unit. By adopting the differential architecture, the improved differential-architecture SONOS flash storage unit effectively widens the distinguishable current range in the read operation, and has the advantages of better impedance matching of the storage unit branch circuits and higher stability.

Description

technical field [0001] The invention relates to the field of Flash memory, in particular to an improved differential architecture SONOS Flash storage unit. Background technique [0002] Flash is a non-volatile memory, which has the characteristics of large storage capacity and long data storage time. It can be erased and written up to 100,000 times, and its data update speed is much faster than that of EEPROM. Save data, often used to save some important configuration information. [0003] In 1988, S. Tam of Intel Corporation proposed the classic ETOX ( Electron T unneling Ox ide device ) FLASH structure in the document "A High Density CMOS 1-T Electrically Erasable Non-Volatile (Flash) Memory Technology", To date, most new structures have been developed from it. Its structure is as follows figure 1 As shown, it is mainly composed of substrate, tunnel oxide layer, polycrystalline floating gate (FG), inter-gate insulating layer and polycrystalline control gate (CG). Flash...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/26
Inventor 翁宇飞姜伟张其笑胡玉青李二亮
Owner SUZHOU KUANWEN ELECTRONICS SCI & TECH