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Semiconductor device manufacturing method

A device manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., to achieve the effect of avoiding erosion, improving performance and reliability

Active Publication Date: 2014-06-04
锐立平芯微电子(广州)有限责任公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In other words, the existing technology of removing the dummy gate insulating layer in the gate-last process is difficult to avoid the substrate from being corroded

Method used

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  • Semiconductor device manufacturing method
  • Semiconductor device manufacturing method
  • Semiconductor device manufacturing method

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Embodiment Construction

[0021] The features and technical effects of the technical solution of the present invention will be described in detail below with reference to the accompanying drawings and in combination with schematic embodiments, and a semiconductor device and a manufacturing method thereof that can effectively prevent the substrate from being corroded are disclosed. It should be pointed out that similar reference numerals represent similar structures, and the terms "first", "second", "upper", "lower" and the like used in this application can be used to modify various device structures or manufacturing processes . These modifications do not imply spatial, sequential or hierarchical relationships of the modified device structures or fabrication processes unless specifically stated.

[0022] Refer to the following Figure 1 to Figure 6 A schematic diagram of each step is used to describe the technical solution of the present invention in detail.

[0023] refer to figure 1 A cross-sectio...

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Abstract

The invention discloses a semiconductor device manufacturing method. The method comprises the steps that a dummy gate insulating layer and a dummy gate layer are formed on a substrate; lining layers are formed on both sides of the dummy gate layer; gate side walls are formed on the substrate on both sides of the lining layers; the dummy gate layer is removed until the dummy gate insulating layer is exposed; the dummy gate insulating layer is removed until the substrate is exposed; and a gate trench is formed. According to the semiconductor device manufacturing method provided by the invention, silicon nitride made of CVD is used as the dummy gate insulating layer and the side of the dummy gate layer to form the oxide lining layers; unnecessary erosion of the substrate and especially the channel region can be avoided; and the performance and the reliability of a device are improved.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor structure, in particular to a method for manufacturing a semiconductor device, especially a semiconductor intermediate structure, which can effectively prevent erosion of a channel and a substrate in a gate-last process device. Background technique [0002] After MOSFET devices are scaled down to 45nm, the device requires a stack structure of high dielectric constant (high k) as the gate insulating layer and metal as the gate conductive layer to suppress high gate leakage due to polysilicon gate depletion issues and the gate capacitance is reduced. In order to control the profile of the gate stack more effectively, the gate-last process is widely used in the industry, that is, the dummy gates made of polysilicon and other materials are usually deposited on the substrate first, and the dummy gates are removed after depositing the interlayer dielectric layer (ILD). gate, followed by fil...

Claims

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Application Information

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IPC IPC(8): H01L21/28
CPCH01L29/401H01L29/66545
Inventor 崔虎山钟汇才赵超
Owner 锐立平芯微电子(广州)有限责任公司
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