Unlock instant, AI-driven research and patent intelligence for your innovation.

High-performance domino circuit design based on clock extraction bias voltage technology

A bias voltage and domino technology, applied in logic circuits, pulse technology, electrical components, etc., can solve the problems of increasing the anti-noise interference of domino circuits, increasing the size of the holding tube, and the negative impact of the holding tube cannot be ignored.

Inactive Publication Date: 2014-06-18
BEIJING UNIV OF TECH
View PDF5 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the need to increase the noise immunity of the domino circuit in some specific designs, the size of the holding tube is increased, which makes the negative impact of the holding tube even more non-negligible

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • High-performance domino circuit design based on clock extraction bias voltage technology
  • High-performance domino circuit design based on clock extraction bias voltage technology
  • High-performance domino circuit design based on clock extraction bias voltage technology

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0021] The present invention will be further described below in conjunction with the accompanying drawings.

[0022] Such as figure 2 As shown, the domino circuit includes three parts: a first-stage dynamic logic circuit, a second-stage dynamic logic circuit, and a delay unit between the two-stage dynamic logic circuits.

[0023] To achieve the above object, the present invention is a high-performance domino circuit based on clock extraction bias voltage technology. Such as figure 2 The domino circuit includes three parts: a first-stage dynamic logic circuit, a second-stage dynamic logic circuit and a delay unit between the two-stage dynamic logic circuits.

[0024] In the first-stage dynamic logic circuit, there are pre-charged PMOS transistor Mp0, holding PMOS transistor Mhk0, pull-down network PDN0, and inverter invA; the source of Mp0 is connected to the power supply, the drain is connected to the dynamic node 0, the substrate is connected to the power supply, and the ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to high-performance domino circuit design based on a clock extraction bias voltage technology, belongs to the technical field of integrated circuit design, and particularly relates to SRAM (static random access memory) bit line circuit design. A clock signal is extracted in a proper position from a domino delay unit, is processed and is connected into a keeping tube substrate in a dynamic logic circuit. The generation of competition current can be effectively reduced, so higher response speed and lower power consumption are acquired, and meanwhile stronger process floating resistance and noise interference resistance are acquired. The high-performance domino circuit design has lower design complexity, and the area of a layout is reduced to a certain degree.

Description

technical field [0001] The invention relates to a domino circuit, which belongs to the field of integrated circuit design, in particular to a bit line circuit design of an SRAM. Background technique [0002] With the development of integrated circuits, microprocessors have been widely used in various high-end electronic devices. On-chip memory (register file, buffer memory, etc.) is the key path for data reading in the microprocessor, which restricts the development of the microprocessor. Therefore, reducing the memory access delay becomes the key to improving the performance of the memory and even the microprocessor. The characteristic of fast operation speed unique to the domino circuit meets the design requirements of the on-chip memory. Designers usually use the high fan-in domino circuit in the local bit line (LBL) and global bit line (GBL) of the memory. However, there are still three major challenges for the design of the bit line: 1. The power consumption of the bi...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/017H03K19/096
Inventor 汪金辉杨泽重侯立刚宫娜王莉娜
Owner BEIJING UNIV OF TECH