SiGe body region longitudinal 1T-DRAM device and manufacturing method thereof

A 1T-DRAM, device manufacturing method technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices and other directions, can solve the problems of body region potential limitation, difficult to dissipate heat, incompatibility, etc., to reduce the unit area, improve the Integration, the effect of increasing signal margin

Active Publication Date: 2014-08-06
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0005] At present, the structure of IT-DRAM is generally based on SOI planar structure, and the main problem of 1T-DRAM with SOI planar structure is that the potential of the body region is limited by the hole barrier between the body region and the source and drain.
In addition, the SOI substrate is not compatible with the currently widely used bulk silicon process, and there is a problem that it is not easy to dissipate heat

Method used

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  • SiGe body region longitudinal 1T-DRAM device and manufacturing method thereof
  • SiGe body region longitudinal 1T-DRAM device and manufacturing method thereof
  • SiGe body region longitudinal 1T-DRAM device and manufacturing method thereof

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Embodiment Construction

[0025] Hereinafter, the present invention is described by means of specific embodiments shown in the drawings. It should be understood, however, that these descriptions are exemplary only and are not intended to limit the scope of the present invention. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present invention.

[0026] First of all, the present invention provides a method for manufacturing a semiconductor device, the manufacturing process of which is shown in the appended Figure 1-20 .

[0027] First, see attached figure 1 , is a layout of the 1T-DRAM device structure and array in the embodiment of the present invention, including three layers. figure 1 A 1T-DRAM unit is inside the dotted box. The horizontal dotted line Aa indicates the direction along which the bit line extends, and the vertical dotted line Bb indicates the direction along which the word lin...

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Abstract

The invention provides a longitudinal nano-pillar 1T-DRAM device and array based on SiGe energy-band engineering. A longitudinal nano-pillar transistor is adopted, laminated layers formed through epitaxy serve as a channel region and a drain region respectively, large space is provided for design of the channel region and the drain region, and many implementation schemes are provided for promoting the 1T-DRAM performance. Meanwhile, the structure of the longitudinal transistor is beneficial to integration of the SiGe channel region; epitaxy SiGe is adopted as the channel region, a potential well of a hole is formed in the channel region by means of the difference between the valence band of the SiGe and the valence band of Si, and therefore the current difference between the 1-reading state and the 0-reading state of a 1T-DRAM.

Description

technical field [0001] The invention relates to the field of semiconductor devices and manufacturing methods thereof, in particular to a vertical high-integration transistor structure based on SiGe energy band engineering and a manufacturing method thereof. Background technique [0002] With the continuous shrinking of the feature size of semiconductor integrated circuit devices, the size of the traditional 1T / 1C embedded DRAM unit is shrinking, and the area of ​​its capacitor is becoming more and more difficult with scaling down (scalingdown), and the manufacturing process is becoming more and more complicated. , The compatibility with the logic device process is getting worse and worse. Therefore, capacitorless DRAM (Capacitorless DRAM) with good compatibility with logic devices will have a good development prospect in the field of high-performance embedded DRAM of VLSI. Among them, 1T-DRAM (One Transistor Dynamic Random Access Memory) utilizing floating body effect is th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8242H01L27/108
CPCH10B12/20H10B12/01
Inventor 方雯罗军赵超
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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