Extensible 2.5-dimensional multi-core processor architecture

Abstract

The invention belongs to the technical field of multi-core processors, in particular to an extensible 2.5-dimensional multi-core processor architecture. The extensible 2.5-dimensional multi-core processor architecture communicates with an extensible chip through interlinked multi-core processor chips of two-dimensional grid structure networks on chips and a high-speed data transmit channel which is provided by an SerDes interface. In the longitudinal direction, the processor reads and writes an individual character and directly accesses data through an off-chip memory interface and an off-chip memory; in the transverse direction, the processor controls and interacts data through an off-chip accelerating interface and an off-chip accelerator; the extensible 2.5-dimensional multi-core processor architecture is capable of supporting longitudinal and transverse multi-core chip extension through configuring a data selector at the interface between the chips through a software. Different interlinked chips are bonded in the same substrate through a 2.5-dimensional technique and are integrated in the same encapsulation. The extensible 2.5-dimensional multi-core processor architecture smartly supports the extension of the storage space of a traditional 2-dimensional multi-core processor, the coupling of a variety of accelerators and the extension of core computing resource, enables the reusability of the chip-level IP and the reconfigurability of the system-level design to be improved, enables the large chip design period to be shortened, and enables the manufacturing cost to be lowered.

Description

technical field [0001] The invention belongs to the technical field of multi-core processors, and specifically relates to an expandable 2.5D multi-core processor architecture. Background technique [0002] Since Intel Corporation of the United States launched the world's first commercial microprocessor chip 4004 in 1971, the performance of the processor has been continuously rising under the double impetus of the rapid development of integrated circuit manufacturing technology and pipeline design technology. On the one hand, under the impetus of Moore's Law, the lower channel delay of the new generation process node has increased the main frequency of the processor, and the smaller feature size allows the chip to have greater integration density and circuit design complexity; on the other hand On the one hand, processor designers have also proposed and practiced many complex pipeline technologies to improve instruction throughput, such as very long instruction word (VLIW) an...

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Problems solved by technology

However, these trends will also bring many shortcomings and challenges: for example, the area of ​​the chip continues to increase, resulting in an increase in tape-out costs, an increase in the workload of chip physical design, and a longer design cycle; and the reliability of traditional two-dimensional (2D) chips. Scalability, reconfigurability is not strong

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