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SRAM (Static Random Access Memory) and preparation method thereof

A memory and ion implantation technology, applied in the semiconductor field, can solve problems such as device performance degradation, and achieve the effect of improving yield and small threshold voltage mismatch

Active Publication Date: 2014-10-01
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] At present, the LDD of the SRAM pull-down transistor (Pull Down, PD) is after the process of forming the gate structure, and also after the injection of the PU (Pull Up, PU) LDD, which leads to a decrease in device performance. Therefore, to improve the performance of semiconductor devices, It is necessary to improve the preparation process of the current device

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  • SRAM (Static Random Access Memory) and preparation method thereof

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Embodiment Construction

[0032] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0033] In order to thoroughly understand the present invention, a detailed description will be provided in the following description to illustrate the SRAM memory and its manufacturing method of the present invention. Obviously, the practice of the invention is not limited to specific details familiar to those skilled in the semiconductor arts. Preferred embodiments of the present invention are described in detail below, however, the present invention may have other embodiments besides these detailed descriptions.

[0034] It should be noted that the terms use...

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Abstract

The invention relates to a SRAM (static random access memory) and a preparation method thereof. The preparation method comprises the following steps: providing a semiconductor substrate; carrying out halo / LDD (Lightly Doped Drain) ion injection to a PD(Pull down) on the semiconductor substrate; carrying out halo / LDD (Lightly Doped Drain) ion injection to a PU(Pull Up) on the semiconductor substrate; carrying out the halo / LDD ion injection to a PMOS (P-channel Metal Oxide Semiconductor) area of a core area on the semiconductor substrate; carrying out the halo / LDD ion injection to an NMOS (N-channel Metal Oxide Semiconductor) area of the core area on the semiconductor substrate; carrying out the halo / LDD ion injection to the PMOS area of an input / output area on the semiconductor substrate; and carrying out the halo / LDD ion injection to the NMOS area of the input / output area on the semiconductor substrate. A conventional ion injection sequence in the prior art is changed by adopting the method. After a grid electrode structure is formed, the SRAM repairs grid corrosion damage, and then, a PD (Pull Down) halo / LDD ion injection step is immediately executed. The PD receives the least photoresist ashing and wet method stripping technologies, PD threshold voltage mismatching reaches the minimum, and the yield of the SRAM can be effectively improved.

Description

technical field [0001] The invention relates to the field of semiconductors, and in particular, the invention relates to an SRAM memory and a preparation method thereof. Background technique [0002] Static random access memory (SRAM), as a member of volatile memory, has the advantages of high speed, low power consumption and compatibility with standard processes, and is widely used in PCs, personal communications, consumer electronics (smart cards, digital cameras, multimedia players ) and other fields. In particular, high-speed synchronous SRAMs are used in applications such as workstations with cache memory, which provides high-speed storage for reused data or instructions. [0003] In the design and production process of SRAM devices, due to uncertainties, random errors, gradient errors and other reasons, some semiconductor devices that are identical in design have errors after production, which is called the mismatch process of semiconductor devices (Mismatch process)....

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8244H01L21/265H01L27/11H10B10/00
CPCH01L21/26513H10B10/12
Inventor 李勇陶佳佳居建华
Owner SEMICON MFG INT (SHANGHAI) CORP