Carrier substrate and manufacturing method thereof

Abstract

The invention discloses a carrier substrate and a manufacturing method thereof. The carrier substrate includes a dielectric layer, a first circuit layer, an insulating layer, a plurality of conductive blocks and a first conductive structure. The dielectric layer has a first surface, a second surface and a plurality of blind holes. The first circuit layer is buried in the first surface, and the blind hole extends from the second surface to the first circuit layer. The insulating layer is disposed on the first surface and has a third surface, a fourth surface and a plurality of first openings. The first opening exposes the first circuit layer, and the diameter of each first opening gradually increases from the third surface toward the fourth surface. The conductive block fills the first opening and connects to the first circuit layer. The first conductive structure includes a plurality of conductive holes filled with blind holes and a second circuit layer disposed on a portion of the second surface.

Description

technical field [0001] The invention relates to a substrate and a manufacturing method thereof, and in particular to a carrier substrate suitable for carrying components and a manufacturing method thereof. Background technique [0002] In recent years, with the rapid development of electronic technology and the emergence of high-tech electronic industries, electronic products with more humanization and better functions are constantly being introduced, and are designed towards the trend of light, thin, short and small. In these electronic products, a carrier substrate is usually arranged. In addition to having conductive circuits, the carrier substrate can also carry components such as capacitors, inductors, resistors, IC chips or packages as a data processing unit of the electronic products. [0003] However, the connection pads and the traces on the conventional carrier substrate are on the same level, and the opening of the solder resist layer will simultaneously expose th...

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Problems solved by technology

[0003] However, the connection pads and traces on the existing carrier substrate are on the same level, and the opening of the solder resist layer will expose the connection pads and traces in the pre-connection area at the same time

Therefore, in addition to the above-mentioned configuration, it is easy to cause the wiring to oxidize and affect the electrical performance, and the user cannot easily distinguish the connection pad from the wiring, so that it is impossible to accurately connect the component directly to the connection pad.

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