Large-dynamic and high-precision programmable time delay device based on FPGA (field programmable gate array)

Abstract

The invention relates to the technical field of electrons, in particular to a large-dynamic and high-precision programmable time delay device based on an FPGA (field programmable gate array). A target signal is subjected to precise time delay according to a fact that a read-write clock has a time delay function on asynchronous FIFO (first in first out) with a phase difference. The large-dynamic and high-precision programmable time delay device comprises a clock frequency and precision setting module, a delay value control module, a clock management PLL (phase locked loop), a read-write control signal module and an asynchronous FIFO module, wherein the output end of the clock frequency and precision setting module is connected with the input end of the clock management PLL; the output end of the delay value control module is connected with the input end of the delay value control module and the input end of the read-write control signal module; the output end of the read-write control signal module is connected with the input end of the asynchronous FIFO module; the output end of the clock management PLL is connected with the input end of the asynchronous FIFO module and the input end of the read-write control signal module. The invention has the beneficial effects that the large-dynamic and high-precision programmable time delay device based on the FPGA has the advantages of high integration degree and high stability; meanwhile, the technical bottleneck that the time delay range and the precision cannot be considered simultaneously at present is solved. The invention is particularly suitable for the large-dynamic and high-precision programmable time delay devices.

Description

technical field [0001] The invention belongs to the field of electronic technology, and in particular relates to an FPGA-based large dynamic and high-precision programmable delay device. Background technique [0002] In the field of electronics and communication engineering, delay circuits are widely used, especially in radar echo signal simulation systems, synchronous communication systems, and time digital measurement systems. The basis of the project is to realize the echo channel simulator, which is a system for testing echo under experimental conditions. For the simulation of multipath delay, a high-precision delay circuit is required. [0003] The current technical solutions of delay circuits are mainly divided into three categories: analog delay circuits, digital delay circuits and digital-analog hybrid delay circuits. Analog circuits mainly use physical delay methods, such as conductive lines, special devices, etc. The current devices can be made with high precision...

AI Technical Summary

Problems solved by technology

Analog circuits mainly use physical delay methods, such as conductive lines, special devices, etc. The current devices can be made with high precision, but the dynamic range is too small

The methods of digital circuits mainly include counter method, memory method, logic unit delay method, and the accuracy of these methods is difficult to achieve high

Someone proposed to use the digital-analog hybrid method, that is, to achieve a large dynamic range through a digital circuit, and to achieve a small delay through a dedicated chip, but the disadvantage is that it is not conducive to system integration

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