Varactor control circuit low in amplitude-frequency modulation efficiency and implementing method of varactor control circuit
A technology of control circuit and implementation method, which is applied in the direction of electrical components, power oscillators, etc., can solve the problems of reducing DCO jitter performance, and achieve the effect of simple structure and low jitter
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[0023] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.
[0024] see figure 2 , figure 2 It is a schematic diagram of the varactor control circuit of the present invention. It includes a first NMOS transistor (M1), a first PMOS transistor (M2), a second PMOS transistor (M3), a third PMOS transistor (M4), a first fixed capacitance capacitor (C1), a first varactor ( VAR_MOS), wherein the gate of the first NMOS transistor (M1) is connected to the bias voltage (Vbias), the drain is connected to the drain of the first PMOS transistor (M2), the source and the substrate are connected to the power ground (GND), and the first The gate of the PMOS transistor (M2) is connected to the drain of the third PMOS transistor (M4), the drain and the gate are short-circuited, the source is connected to the drain of the second PMOS transistor (M3), the substrate is connected to the power supply (VDD), The s...
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