A plc physical layer clock synchronization method

A physical layer clock and sampling clock technology, applied in the direction of synchronization devices, digital transmission systems, electrical components, etc., can solve problems such as loop problems, reception deterioration, instability, etc., to shorten networking time, increase robustness, and simplify The effect of maintenance

Active Publication Date: 2019-03-19
武汉晟联智融微电子科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The second disadvantage is instability. When a node loses synchronization due to channel changes resulting in poor reception, other nodes that maintain synchronization with this node will lose synchronization.
In addition, there are loop problems, etc.
That is, when the frequency reference node of a node loses synchronization, the node needs to reselect the frequency reference node. During this process, it is easy to form a loop, and the nodes in the loop become frequency reference nodes with each other, and cannot communicate with other nodes in the system. communication

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0012] A PLC physical layer clock synchronization method, the transmission signal of the physical layer is composed of a frame header modulated by known data OFDM and a frame body modulated by control data or upper layer data that needs to be transmitted, and inserted into the frame body The pilot signal modulated by known data OFDM; when the receiver processes the received signal of the frame header, it estimates the preliminary clock frequency and phase deviation; according to the estimated sampling clock error, the digital received signal is interpolated, so that the interpolation The sampling clock of the obtained digital received signal is synchronized with the digital signal of the transmitting end on the clock; when the receiver processes the received signal of the frame body part, the clock phase deviation is further estimated according to the pilot signal, and the interpolated parameters are calculated according to the estimated clock phase deviation Make adjustments. ...

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PUM

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Abstract

The invention discloses a PLC (power line communication) physical layer clock synchronizing method. The method is characterized in that the transmitting signal of a physical layer comprises a frame header formed by OFDM modulation of known data and a frame body formed by OFDM modulation of control data or upper-layer data required to be transmitted, and a pilot signal formed by OFDM modulation of known data is inserted into the frame body; when a receiving machine processes the receiving signal of the frame header, and preliminary clock frequency and phase deviation are estimated; interpolation is performed on the digital receiving signal according to the estimated sampling clock error so as to allow the sampling clock of the digital receiving signal obtained through interpolation to synchronize with the clock of the digital signal of a transmitting end; when the receiving machine process the receiving signal of the frame body, clock phase deviation is further estimated according to the pilot signal, and the parameters of interpolation is adjusted according to the estimated clock phase deviation. By the method, signals of other nodes can be received, networking time is shortened, network robustness is increased, and network maintenance is simplified.

Description

technical field [0001] The invention belongs to the field of power line communication, and in particular relates to a PLC physical layer clock synchronization method. Background technique [0002] Power line communication (PLC) is to use the power line as the physical transmission medium for information transmission, which has the advantages of simple system layout, reliable information transmission and low system cost. Compared with other wired communication systems, power line communication does not need to be re-wired. With the use of existing power lines, communication can be carried out as long as there is electricity, which avoids the trouble of wiring construction and saves high wiring costs. Compared with wireless communication systems, power line communication has reliable transmission and does not consider the signal coverage problem caused by obstacles. Power line communication has a wide range of applications in smart cities, smart buildings, smart homes, and th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L7/00
Inventor 姚飞
Owner 武汉晟联智融微电子科技有限公司
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