Device equivalent circuit model parameter extracting method and bonding pad parasitic parameter extracting method

Abstract

The invention discloses a device equivalent circuit model parameter extracting method and mainly aims at solving the problems in the prior art, such as complicated extracting process and inaccurate extracting results. The parasitic parameter extracting method comprises the following steps: dividing a short-circuit bonding pad equivalent circuit from which a parasitic capacitor is de-embedded into independent networks for further analysis, and synchronously extracting parasitic resistance and parasitic inductance parameters. The invention further discloses a bonding pad parasitic parameter extracting method applying the equivalent circuit parameter extracting method. Simulation results show that parasitic parameter extracting results are highly matched with scattering parameters of actual device test results, and the parameters are more accurately and rapidly extracted.

Description

technical field [0001] The invention relates to a device equivalent circuit model parameter extraction method and a de-embedded transistor device test pad parasitic parameter extraction method, belonging to the technical field of integrated circuits. Background technique [0002] Transistor models mainly include two types, physical models and equivalent circuit models. Among them, the equivalent circuit model is a general and effective model for simulating transistors. Establishing an accurate equivalent circuit model is the key to the success of circuit design. The core factor that reduces the cost of development and production. [0003] For the transistor device model, the calibration of test equipment, de-embedding of pad parasitics, the topology of the equivalent circuit and the extraction method of parameters will all affect the accuracy of the model (Erickson N, Shringarpure K, Fan J, et al. De-embedding Techniques for transmission lines: An exploration, review, and ...

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Problems solved by technology

However, there are certain defects in this method. Because the parasitic capacitance parameters are difficult to completely peel off, when the curve of the real part of the Z parameter and the frequency is drawn to extract the parasitic resistance parameter, the curve of the real part of the Z parameter and the resistance will appear to be dependent on frequency. At the same time, it will also affect the accuracy of extracting the inductance from the imaginary part of the Z parameter (Gu D, Wallis T M, Blanchard P, et al. De-embedding parasitic elements of GaN nanowire metal semiconductor field effect transistors by use of microwave measurements[J]. Applied Physics Letters, 2011, 98(22): 223109. Reference 4)

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