PLL (phase-locked loop) locking state detection circuit

Abstract

The invention provides a PLL (phase-locked loop) locking state detection circuit structure, comprising a filtering circuit, a self-resetting sampling circuit, a comparison circuit and a state locking circuit, wherein the value of a trigger chain level number n of the self-resetting sampling circuit is determined according to specific PLL design indexes; the clock input ends of two trigger chains of the self-resetting sampling circuit are respectively controlled by a PLL feedback frequency and a frequency-monitoring phase discriminator output frequency, so that the judgment on the PLL input reference frequency and feedback frequency state is realized, meanwhile the determined output signal is connected with the input end of the comparison circuit, and the determination and sampling on the determination result are realized by utilization of the comparison circuit; the state locking circuit generates two types of locking signals consisting of a variable state locking signal and a constant state locking signal according to the output signal of the comparison circuit; the detection on the PLL locking state is finished. According to the PLL locking state detection circuit structure, the circuit structure is simple and flexible, and two types of locking signals consisting of the variable locking signal and the constant locking signal can be output according to different application requirements.

Description

Technical field [0001] The invention relates to the field of semiconductor integrated circuits, in particular to a phase-locked loop locked state detection circuit. Background technique [0002] The phase-locked loop uses the principle of feedback control to synchronize the frequency and phase of the input signal and the output signal. It mainly includes five parts: a frequency monitoring phase detector, a charge pump, a low-pass filter, a voltage-controlled oscillator and a frequency divider. Phase-locked loops are widely used in various technical fields such as communications, radar, aerospace, automotive electronics, and measuring instruments. The main function is to generate a stable and reliable high-frequency clock signal. With the rapid development of integrated circuit design technology, the main frequency of circuit work has risen linearly. Therefore, the application range of the phase-locked loop will become wider and wider. [0003] The working state of the phase-locke...

AI Technical Summary

Problems solved by technology

In order to judge whether the phase-locked loop is locked, some designers use the counter timing method. When the counter timing is greater than the phase-locked loop locking time, it is considered that the phase-locked loop is locked; , so when the phase-locked loop works in different environments, its locking time is different. This method cannot monitor the working status of the phase-locked loop in real time, and can only use the maximum locking time of the phase-locked loop to ensure that the phase-locked loop enters the locked state

There are also some phase-locked loop lock detection circuits that use the multiple relationship between the input frequency and the output frequency to count, but this method cannot identify the phase out-of-lock situation, and the circuit design is more complicated and inflexible, and it does not take into account how to Hold the locked signal after the phase-locked loop locks for the first time

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