LDMOS (lateral double-diffused metal oxide semiconductor) transistor structure and formation method thereof

Abstract

Disclosed are an LDMOS (lateral double-diffused metal oxide semiconductor) transistor structure and a formation method thereof. The formation method includes forming a deep groove in a substrate, forming a liner layer on the side wall of the deep groove, and filling a semiconductor layer in the deep groove; doping the substrate to form a drift area, and enabling the liner layer and the semiconductor layer within the drift area; forming a first trap and a second trap respectively in the substrate on two sides of the drift area, connecting the first trap and the second trap with the drift area; forming a first grid structure on the drift area and the first trap; forming a second grid structure on the drift area and the second trap; forming a common drain in the semiconductor layer exposed by the first grid structure and the second grid structure; forming a first source in the first trap exposed by the first grid structure, and forming a second source in the second trap exposed by the second grid structure. By the LDMOS transistor structure, breakdown voltage of the LDMOS transistor can be increased without increasing the area of the transistor.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to an LDMOS transistor structure and a forming method thereof. Background technique [0002] Compared with common field effect transistors, LDMOS (lateral double-diffused MOSFET) transistors have obvious advantages in terms of device characteristics such as gain, linearity, switching performance, heat dissipation performance, and reduced number of stages, so they are widely used. [0003] refer to figure 1 , shows a common LDMOS (Lateral Double Diffused Metal Oxide Semiconductor) transistor structure in the prior art. Here, a case where two adjacent N-type transistors share a common drain is used for illustration. LDMOS transistor structures include: [0004] P-type substrate 01; [0005] a first well region 02 disposed in the P-type substrate 01; [0006] a second well region 03 disposed in the P-type substrate 01; [0007] The N-type drift region 04 is disposed between the firs...

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Problems solved by technology

[0012] However, while increasing the size of the shallow trench isolation structure along the direction of the surface of the P-type substrate 01, the area occupied by the transistor is also increased.

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