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NOR gate flash memory

A technology of flash memory and NOT gate, which is applied in the direction of semiconductor devices, electric solid-state devices, electrical components, etc., can solve the problem that the size of NOT gate flash memory cannot be further reduced, and achieve the effect of meeting the operation needs of the device

Active Publication Date: 2015-04-29
GIGADEVICE SEMICON (BEIJING) INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to propose a kind of NOR gate flash memory, this NOR gate flash memory can solve the NOR gate flash memory in the prior art and can only shrink to 45 nanometers, makes the size of NOR gate flash memory can not be further reduced small problem

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Embodiment Construction

[0033] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be fully described below through specific implementation in combination with the drawings in the embodiments of the present invention. Apparently, the described embodiments are some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts, All fall within the protection scope of the present invention.

[0034] figure 2 It is a top view of the NOR gate flash memory provided by the embodiment of the present invention. Figure 2A , Figure 2B , Figure 2C , Figure 2D and Figure 2E yes figure 2 Sectional view along A-A1, B-B1, C-C1, D-D1 and E-E1. Such as figure 2 , Figure 2A , Figure 2B , Figure 2C , Figure 2D and Figure 2E As shown, the fol...

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Abstract

The invention discloses a NOR gate flash memory. The NOR gate flash memory comprises a substrate, oxidation layers, channel regions, tunneling oxidation layers, floating gate layers, control gate layers, interlayer dielectric substance layers, thin film layers, alloy layers, silicon nitride layers, source electrodes, drain electrodes, first metal layers, second metal layers and isolation layers. The substrate is provided with deep isolation channels in the first direction and is provided with shallow isolation channels in the second direction, and the depth of the deep isolation channels is larger than the depth of the shallow isolation channels. The oxidation layers are located in the deep isolation channels. The channel regions are located in the shallow isolation channels. The tunneling oxidation layers are located on the channel regions. The floating gate layers are located on the tunneling oxidation layers. The control gate layers are located on the floating gate layers. The interlayer dielectric substance layers are located between the floating gate layers and the control gate layers. The alloy layers and the silicon nitride layers are sequentially located on the control gate layers. The first metal layers are located on the source electrodes and the drain electrodes. The second metal layers are located on the first metal layers which are located on the drain electrodes. According to the NOR gate flash memory, floating gates are embedded into the substrate, the length of the isolation channels can be increased under the condition that the plane dimension is unchanged, the device operation needs are met, and thus the NOR gate flash memory can be scaled to be smaller than 45 nanometers.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a NOR gate flash memory. Background technique [0002] Flash memory (FLASH) memory has the characteristics of not easy to lose and can be repeatedly erased and read and written. In addition, it also has the characteristics of fast transmission speed and low power consumption, which makes the application of flash memory in portable products, information, communication and consumer electronics products very widely. [0003] NOR FLASH memory is a main flash memory. At present, the size of NOR FLASH is generally limited to the 45nm node, because the writing mechanism of NOR FLASH is the hot carrier injection effect (Hot Carrier Injection, referred to as HCI), but the HCI effect requires the channel of NOR FLASH to be long enough to Ensure that the source and drain are not short-circuited, and at the same time, it is necessary to give enough electric field acceleration energy to the el...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/115H01L29/423H10B41/30H10B69/00
Inventor 冯骏舒清明
Owner GIGADEVICE SEMICON (BEIJING) INC
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