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High-speed QC-LDPC (quasi-cyclic low-density parity-check) encoder based on four-level assembly lines

A pipeline and encoder technology, applied in the field of channel coding, can solve the problems of large memory, slow coding speed and high circuit cost, and achieve the effects of reducing memory, improving throughput and simple structure

Inactive Publication Date: 2015-04-29
RONGCHENG DINGTONG ELECTRONICS INFORMATION SCI & TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This scheme has two disadvantages: one is that a large amount of memory is required, resulting in high circuit cost; the other is that the information bits are serially input, and the encoding speed is slow

Method used

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  • High-speed QC-LDPC (quasi-cyclic low-density parity-check) encoder based on four-level assembly lines
  • High-speed QC-LDPC (quasi-cyclic low-density parity-check) encoder based on four-level assembly lines
  • High-speed QC-LDPC (quasi-cyclic low-density parity-check) encoder based on four-level assembly lines

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Embodiment Construction

[0019] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, and the protection scope of the present invention can be more clearly defined.

[0020] The row weight and column weight of a circular matrix are the same, denoted w. If w=0, then the circulant matrix is ​​an all-zero matrix. If w=1, then the circulant matrix is ​​permutable, called a permutation matrix, which can be obtained by circulantly shifting the identity matrix I to the right by several bits. The check matrix H of the QC-LDPC code is composed of c×t b×b order cyclic matrices H j,k (1≤j≤c, 1≤k≤t, t=e+c) constitute the following array:

[0021]

[0022] Generally, any circulant matrix in the parity check matrix H is either an all-zero matrix (w=0) or a permutation matrix (w=1). Let the circulant matrix H j,k the...

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Abstract

The invention provides a high-speed QC-LDPC (quasi-cyclic low-density parity-check) encoder based on four-level assembly lines. The encoder comprises a multiplier for sparse matrixes and vectors, an I-type backward iterative circuit, a multiplier for high-density matrixes and vectors and an II-type backward iterative circuit. The multiplier for the sparse matrixes and vectors is used for multiplication of the sparse matrixes and vectors, the multiplier for the high-density matrixes and vectors is used for multiplication of the high-density matrixes and vectors, and each of the I-type backward iterative circuit and the II-type backward iterative circuit is used for backward iterative operation. The whole encoding process is divided into the four-level assembly lines. The high-speed QC-LDPC encoder has the advantages of simple structure, low cost, high throughput capacity and the like.

Description

technical field [0001] The invention relates to the field of channel coding, in particular to a high-speed QC-LDPC encoder based on a four-stage pipeline in a communication system. Background technique [0002] A Low-Density Parity-Check (LDPC) code is one of the efficient channel coding techniques, and a Quasi-Cyclic LDPC (QC-LDPC) code is a special LDPC code. Both the generator matrix G and the check matrix H of the QC-LDPC code are arrays composed of circulant matrices, which have the characteristics of segmental circulation, so they are called QC-LDPC codes. The first row of the circulant matrix is ​​the result of the last row being cyclically shifted to the right by 1 bit, and the rest of the rows are the result of the previous row being shifted right by 1 bit. Therefore, the cyclic matrix is ​​completely represented by its first row. Usually, the first row of a circulant matrix is ​​called its generator polynomial. [0003] The communication system usually adopts the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11
Inventor 张鹏刘志文张燕
Owner RONGCHENG DINGTONG ELECTRONICS INFORMATION SCI & TECH CO LTD
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