Method and device for increasing wafer reworking satisfaction rates
A wafer, excellent technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of no removal means, easy short circuit of the wafer, and difficulty in ensuring good rate of CMOS products, etc., to achieve the goal of reducing micro short circuits Probability, wafer surface cleanliness, and the effect of improving the yield
Inactive Publication Date: 2015-05-20
PEKING UNIV FOUNDER GRP CO LTD +1
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Problems solved by technology
[0016] After the photolithography rework is completed, the dry etching step is performed to re-form the metal lines on the wafer, and finally the test for short circuit between the metal lines is carried out. Organic residues, and there is no effective removal method in the subsequent steps, resulting in the reworked wafers still prone to short circuits, so it is difficult to guarantee the good rate of CMOS products in the rework process
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[0047] Since the lithography rework steps in the prior art are difficult to guarantee the good rate after wafer rework, the embodiment of the present invention provides a method and device for improving the good rate of wafer rework to improve the good rate of the reworked wafer .
[0048] First, the embodiment of the present invention provides a method for improving the yield of wafer rework, such as figure 2 As shown, the method includes:
[0049] S101, performing a plasma deglue step on the wafer that needs to be reworked by photolithography;
[0050] S102, performing an organic cleaning step for cleaning residual organic matter after the plasma degumming step on the wafer that has completed the plasma degumming step;
[0051] S103, performing a solution degumming step on the wafer that has completed the organic cleaning step;
[0052] S104, re-performing the photolithography process on the wafer that has completed the solution stripping step.
[0053] In the embodimen...
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The invention discloses a method and a device for increasing wafer reworking satisfaction rates, and relates to the field of semiconductor device manufacture. The method includes carrying out a plasma photoresist stripping step on wafers with photoetching reworking requirements; carrying out an organic cleaning step on organic matters which are remained on the wafers after the plasma photoresist stripping step is carried out on the wafers; carrying out a photoresist stripping step on solution for the wafers after the organic cleaning step is carried out on the wafers; carrying out a photoetching process on the wafers again after the photoresist stripping step is carried out on the solution. The method and the device have the advantage that the satisfaction rates of the reworked wafers can be increased by the aid of the method and the device.
Description
technical field [0001] The invention relates to the field of semiconductor device manufacturing, and specifically designs a method and a device for improving the excellent rate of wafer rework. Background technique [0002] Complementary Metal Oxide Semiconductor (CMOS, Complementary Metal Oxide Semiconductor) is a product formed by etching a wafer. Its source, drain, gate and other electrodes are connected through metal wires. The more complex the The denser the metal lines in the chip, the short circuit between metal lines is a common abnormality in the chip manufacturing process. When the feature size of CMOS products is smaller than 1um, the shape and size of metal lines become the difficulty of metal dry etching process. The Metal Comb parameter is often used in the process to monitor whether there is a short circuit between metal lines. The schematic diagram of its test module is as follows: figure 1 , The metal lines of the comb structure are connected between the ...
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IPC IPC(8): H01L21/027H01L21/02
CPCH01L21/0272H01L21/02079H01L21/02082
Inventor 陈定平朱爱兵陈金园
Owner PEKING UNIV FOUNDER GRP CO LTD