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Input offset control

A technology of offset control and input circuit, applied in the direction of converting DC power input to DC power output, output power conversion device, pulse technology, etc., can solve problems such as control loop instability, ramp signal slope error, change, etc.

Active Publication Date: 2015-07-29
TEXAS INSTR INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, rail-to-rail comparators have varying offsets due to the presence of n-type metal-oxide-semiconductor (NMOS) input transistor pairs and p-type metal-oxide-semiconductor (PMOS) input transistor pairs with different offsets
As a result of different offsets, the offset changes abruptly at the transition point, thereby causing slope errors of the ramp signal and instability of the control loop for PCMC applications

Method used

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Embodiment Construction

[0016] Current mode control has been widely used in the design of power converters. Different modulation schemes are used in current mode control, such as peak current mode control (PCMC), for example. PCMC provides a stable output and is implemented digitally using a digital signal controller (DSC). DSCs are used in a wide variety of applications, such as motor control, power conversion, sensor processing applications, and the like, for reducing power consumption. The DSC's microcontroller contains on-chip control peripherals. The few on-chip control peripherals may include analog-to-digital converters (ADCs), analog comparators, digital-to-analog converters (DACs), pulse-width modulation (PWM) hardware, and programmable slope compensation hardware. refer to figure 1 An exemplary PCMC implementation is illustrated.

[0017] figure 1 is a block diagram of an example PCMC system 100 according to an example scenario. PCMC system 100 is implemented by on-chip peripherals of...

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PUM

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Abstract

Several circuits and methods for input offset control are disclosed. In an embodiment, a input offset control circuit includes a first input circuit and a second input circuit. The first input circuit is configured to operate within first common mode voltage range, configured to provide first input current, and configured to vary the first input current upon or subsequent to a variation of a voltage level in the first common mode voltage range. The second input circuit is coupled to the first input circuit and is configured to operate within second common mode voltage range, configured to provide a second input current, and configured to vary the second input current based on variation of the voltage level in the second common mode voltage range. Upon or subsequent to increasing the common mode voltage, the first input current is reduced and the second input current is increased.

Description

technical field [0001] The present invention relates generally to the field of input offset control. Background technique [0002] According to example cases, power converters such as, for example, phase-shifted full-bridge (PSFB) converters may be used for power conversion in various applications. Examples of applications may include, but are not limited to, server power supplies, telecommunications rectifiers, battery charging systems, renewable energy systems, home appliances, industrial textile machines, and compressors. Power converters may be controlled in various modes such as, for example, peak current mode control (PCMC). Implementing PCMC in a PSFB converter may involve pulse width modulation (PWM) waveform generation with precise timing control. For example, on-chip control peripherals may be used and may include, for example, an analog-to-digital converter (ADC), an analog comparator, a digital-to-analog converter (DAC), PWM hardware, and programmable slope com...

Claims

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Application Information

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IPC IPC(8): H03K19/0185
CPCH03M1/70H02M3/10H03K5/2481H02M3/157H03F3/45183H03F2203/45101H03F2203/45586
Inventor 尼汀·阿加瓦尔
Owner TEXAS INSTR INC