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Electronic component and manufacturing method of electronic component

A technology of electronic components and devices, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, semiconductor devices, etc., and can solve problems such as easy conduction of parasitic electricity, large parasitic capacitance, and poor isolation effect

Active Publication Date: 2018-10-23
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] 1. The PN junction isolation method is used for isolation, and the isolation effect is not good;
[0012] 2. The parasitic capacitance is large, and the parasitic capacitance is easy to conduct

Method used

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  • Electronic component and manufacturing method of electronic component
  • Electronic component and manufacturing method of electronic component
  • Electronic component and manufacturing method of electronic component

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Embodiment Construction

[0038] The present application will be described in detail below with reference to the accompanying drawings and embodiments. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0039] It should be noted that the terminology used here is only for describing specific implementations, and is not intended to limit the exemplary implementations according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should also be understood that when the terms "comprising" and / or "comprising" are used in this specification, it indicates There are features, steps, operations, means, components and / or combinations thereof.

[0040]For the convenience of description, spatially relative terms may be used here, such as "on ...", "over ...", "on the surface of ...",...

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PUM

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Abstract

The invention provides an electronic component and a preparation method for the same. The electronic component comprises one or a plurality of semiconductor devices and is characterized in that the electronic component further comprises one or a plurality of three-dimensional insulating layers; each three-dimensional insulating layer forms an accommodating space, wherein the total part or partial part of at least one semiconductor device is packaged in the accommodating space of the three-dimensional insulating layer by at least one three-dimensional insulating layer. Because the semiconductor devices which are provided with the three-dimensional insulating layer are insulated by the three-dimensional insulating layer, the semiconductor devices of the electronic component have a relatively good insulating effect.

Description

technical field [0001] The present application relates to the technical field of semiconductor integrated circuit manufacturing, and more specifically, to an electronic component and a method for preparing the electronic component. Background technique [0002] Lateral Double-diffused Metal Oxide Semiconductor (LDMOS) is a key technology for high-voltage integrated circuits and power integrated circuits. Its main feature is to add a relatively long lightly doped drift region between the channel region and the drain region. The doping type of the drift region is consistent with that of the drain region. By adding the drift region, it can share the breakdown voltage role. The BCD (Bipolar, CMOS, DMOS) process can simultaneously integrate complementary metal oxide semiconductor (CMOS) devices, bipolar (Bipolar) devices and double diffused metal oxide semiconductor (DMOS) devices, so that the Various functional systems of control, simulation and power are integrated on the sam...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/06H01L29/78H01L21/762H01L21/336
Inventor 刘丽王刚宁冯喆韻贺吉伟蒲贤勇
Owner SEMICON MFG INT (SHANGHAI) CORP