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Silicon-Based Low Leakage Current Cantilever Beam Gate Metal Oxide Field Effect Transistor NOR Gate

A technology of field effect transistors and cantilever beams, which is applied in the field of micro-electromechanical systems, can solve problems such as chip overheating, chip life reduction, and affecting chip stability, and achieve the effects of reducing gate DC leakage current and power consumption

Active Publication Date: 2017-12-19
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Then there is the problem of power consumption of the integrated circuit, and excessive power consumption will make the chip overheat, and the operating characteristics of the transistor will be affected by the temperature and change, so the overheated chip temperature will not only reduce the life of the chip, but also Will affect the stability of the chip

Method used

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  • Silicon-Based Low Leakage Current Cantilever Beam Gate Metal Oxide Field Effect Transistor NOR Gate
  • Silicon-Based Low Leakage Current Cantilever Beam Gate Metal Oxide Field Effect Transistor NOR Gate
  • Silicon-Based Low Leakage Current Cantilever Beam Gate Metal Oxide Field Effect Transistor NOR Gate

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Embodiment Construction

[0014] The silicon-based low-leakage current cantilever grid MOSFET NOR gate of the present invention is mainly composed of two cantilever grid NMOS transistors, that is, the first NMOS transistor 1 and the second NMOS transistor 2, and a load resistor 3 with a suitable resistance value. The sources of the NMOS transistors are connected together to the common ground, and the drains of the two NMOS transistors are also connected together and then connected to the load resistor 3. The resistance of the load resistor 3 is determined by the resistance of the NMOS transistors in the on or off state. The voltage division ratio of the power supply voltage further determines whether the output is high level or low level, and the load resistor 3 is connected to the power supply voltage. The two input signals are respectively input on the gates of the two NMOS transistors, and the output signal is output between the drains of the two NMOS transistors and the load resistor 3; the lead 4 i...

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Abstract

The silicon-based low-leakage current cantilever gate metal oxide field effect transistor NOR gate of the present invention consists of two cantilever gate NMOS transistors, that is, the first NMOS transistor (1) and the second NMOS transistor (2) and a load resistor (3 ), the sources of the two NMOS transistors are connected to the common ground, and the drains are also connected together and then connected to the power supply voltage through the load resistor (3). Input on the pole, the output signal is output between the drains of the two NMOS transistors and the load resistor (3); the lead (4) is made of Al, and the gate of the NMOS transistor is suspended above the silicon dioxide layer (5) to form a cantilever Beam grid (6), one end of the cantilever beam grid (6) is fixed on the anchor area (7), and the other end is suspended on the silicon dioxide layer (5), when the applied voltage is less than the threshold voltage of the NMOS tube, the cantilever beam grid Just can't be pulled down, make the NOR gate in the present invention have less DC leakage current.

Description

technical field [0001] The invention provides a silicon-based low-leakage current cantilever beam gate Metal Oxide Semiconductor Field Effect Transistor (MOSFET) NOR gate, which belongs to the technical field of micro-electromechanical systems (MEMS). Background technique [0002] With the in-depth development of microelectronics technology, the size of transistors has now reached the nanometer level, and the integration level of the corresponding integrated circuit per unit area is still continuously improving, and the functions of the chip are becoming more and more complex, showing a state of digital-analog hybrid. At the same time, the processing speed of chips is getting higher and higher. Then there is the problem of power consumption of the integrated circuit, and excessive power consumption will make the chip overheat, and the operating characteristics of the transistor will be affected by the temperature and change, so the overheated chip temperature will not only r...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03D7/16
Inventor 廖小平陈子龙
Owner SOUTHEAST UNIV