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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as plasma damage of gate oxide layer, and achieve the effect of solving plasma damage

Active Publication Date: 2018-07-03
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The present application aims to provide a semiconductor device and its manufacturing method to solve the problem of plasma damage to the gate oxide layer in the process of forming an interlayer dielectric layer in the prior art

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Embodiment Construction

[0026] It should be pointed out that the following detailed description is exemplary and intended to provide further explanation to the present application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0027] It should be noted that the terminology used here is only for describing specific implementations, and is not intended to limit the exemplary implementations according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should also be understood that when the terms "comprising" and / or "comprising" are used in this specification, it indicates There are features, steps, operations, means, components and / or combinations thereof.

[0028] For the convenience of description, spatially relative terms may be used here...

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Abstract

The present application provides a semiconductor device. The semiconductor device includes a semiconductor front-end process structure and a semiconductor back-end process structure. The semiconductor front-end process structure includes: a semiconductor substrate, in which a well region and an ion implantation region are arranged, and a drain is arranged in the well region; a gate oxide layer, It is arranged on the surface of the semiconductor substrate; the gate is arranged on the gate oxide layer; the semiconductor back-end process structure includes: an interlayer dielectric layer, in which via holes are arranged; a metal wiring layer, in which metal parts and The dielectric part is connected to the metal part through the via hole, and the gate is connected to the ion implantation region through the via hole and the metal part. The above-mentioned semiconductor device also includes an additional well region, and the ion implantation region is arranged in the additional well region. The impurity ions are the first impurity ions of the same type. The additional well region makes there is no potential difference between the gate and the drain; the additional well region can be completed in the semiconductor front-end process, and will not affect the production of the interlayer dielectric layer or the metal wiring layer.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to a semiconductor device and a manufacturing method thereof. Background technique [0002] In the field of semiconductor manufacturing, plasma is used in many processes such as etching process, ion implantation process and chemical vapor deposition process. In theory, the total external electrical property of plasma should be neutral, that is to say, positive ions and negative ions It is equal, but the positive and negative ions that actually enter the wafer are not equal in local areas, resulting in a large number of free charges. figure 1 A schematic cross-sectional structure diagram of a semiconductor device in the prior art is shown. After the semiconductor front-end process is completed, a well region 101, a drain 102, a source ( figure 1 not marked), ion implantation region 103, and form a gate oxide layer 201 on the semiconductor substrate...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L21/336
Inventor 罗鹏程李广宁
Owner SEMICON MFG INT (SHANGHAI) CORP