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Method of cutting semiconductor wafer

A technology for semiconductors and wafers, applied in the field of cutting semiconductor wafers, which can solve the problems of contamination of bare chips, uneven side surfaces or sidewalls, and inability to separate bare chips.

Active Publication Date: 2020-08-11
UTAC HEADQUARTERS PTE LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, we have found that the usual plasma etch process cannot effectively separate the die from the wafer, and the diced die may also suffer from contamination caused by the plasma etch process
Typical plasma etch processes can also result in rough or uneven side surfaces or sidewalls of the sawed die

Method used

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  • Method of cutting semiconductor wafer
  • Method of cutting semiconductor wafer
  • Method of cutting semiconductor wafer

Examples

Experimental program
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Embodiment Construction

[0011] In general, embodiments relate to methods of dicing or singulating semiconductor wafers. Embodiments described in this disclosure relate to a plasma etch process in a dicing process. Embodiments of the present disclosure are applicable to dicing any type of wafer, including wafers that are sensitive to mechanical stress, such as wafers having low-k and ultra-low-k materials therein. The dicing methods that will be described in this disclosure may also be used in wafer level chip scale packaging (WLCSP) applications where singulation is performed after wafer level packaging. For example, the chip / die or package may include any type of integrated circuit (IC), such as a memory device, optoelectronic device, logic device, communication device, digital signal processor (DSP), microcontroller, system-on-a-chip, and Other types of devices, or combinations thereof, where memory devices include dynamic random access memory (DRAM), static random access memory (SRAM), and variou...

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PUM

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Abstract

The invention discloses a method for dividing a wafer. The method includes providing a wafer having a first major surface and a second major surface. The wafer is prepared with a plurality of dies located on the master device area and separated from each other by the singulation vias on the first major surface of the wafer. A film is provided on either the first major surface or the second major surface of the wafer. The film covers at least an area corresponding to the area of ​​the main device. The method also includes plasma etching the wafer through the exposed semiconductor material of the wafer using the film as an etch mask to form voids separating the plurality of dies on the wafer into a plurality of individual dies.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to US Provisional Application No. 62062,967, filed October 13, 2014, entitled "Method of Slicing Semiconductor Wafers," the disclosure of which is hereby incorporated by reference in its entirety for all purposes. Background technique [0003] The dicing process, also known as singulation, is commonly used to separate multiple chips formed on a wafer. Various dicing processes may be used to separate a plurality of chips formed on a wafer into individual chips for packaging. One common process is mechanical sawing. During mechanical sawing, a high-speed rotating diamond saw separates the chips from each other along the kerf or dicing channel. However, each chip is prone to cracks or chipping due to the mechanical stress induced by the knife edge. Furthermore, it is very time consuming to separate the chips from the full wafer using mechanical sawing. [0004] In order to alleviate the ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/78H01L21/3065H01L21/308
CPCH01L21/3065H01L21/3083H01L21/78H01L21/6835H01L21/6836H01L23/544H01L24/94H01L2221/68327H01L2221/6834H01L2221/68381H01L2223/54426H01L2223/5446H01L2224/05624H01L2224/05644H01L2224/05647H01L2224/05655H01L2224/1134H01L2224/131H01L2224/13144H01L2224/13147H01L2224/94H01L2224/11H01L2224/03H01L2924/00014H01L2924/014H01L2924/013H01L21/268H01L21/304H01L21/31133H01L21/31144H01L21/82H01L23/293H01L23/3114H01L23/3171H01L24/14H01L2223/54453
Inventor 尼尔逊·威廉·约翰苏斯王孙逊·奈萨厐何明永王宝龙
Owner UTAC HEADQUARTERS PTE LTD