Method of cutting semiconductor wafer
A technology for semiconductors and wafers, applied in the field of cutting semiconductor wafers, which can solve the problems of contamination of bare chips, uneven side surfaces or sidewalls, and inability to separate bare chips.
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[0011] In general, embodiments relate to methods of dicing or singulating semiconductor wafers. Embodiments described in this disclosure relate to a plasma etch process in a dicing process. Embodiments of the present disclosure are applicable to dicing any type of wafer, including wafers that are sensitive to mechanical stress, such as wafers having low-k and ultra-low-k materials therein. The dicing methods that will be described in this disclosure may also be used in wafer level chip scale packaging (WLCSP) applications where singulation is performed after wafer level packaging. For example, the chip / die or package may include any type of integrated circuit (IC), such as a memory device, optoelectronic device, logic device, communication device, digital signal processor (DSP), microcontroller, system-on-a-chip, and Other types of devices, or combinations thereof, where memory devices include dynamic random access memory (DRAM), static random access memory (SRAM), and variou...
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