Unlock instant, AI-driven research and patent intelligence for your innovation.

A semiconductor memory device, its manufacturing method, and electronic device

A technology for memory devices and electronic devices, applied in semiconductor devices, electric solid state devices, circuits, etc., can solve the problems of word line breakdown, sidewall damage, etc.

Active Publication Date: 2019-07-26
SEMICON MFG INT (SHANGHAI) CORP
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] With the continuous shrinking of the size of the memory device, it brings challenges to the device preparation. The current method of preparing the contact hole is usually to deposit an interlayer dielectric layer between the gate structures and directly etch it, and then fill it with a conductive material. However, the control of the sidewall is very critical in this process, and it is easy to cause damage to the sidewall, resulting in the breakdown of the contact hole from the word line (WL) to the drain region.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A semiconductor memory device, its manufacturing method, and electronic device
  • A semiconductor memory device, its manufacturing method, and electronic device
  • A semiconductor memory device, its manufacturing method, and electronic device

Examples

Experimental program
Comparison scheme
Effect test

preparation example Construction

[0043] At present, the manufacturing method of the semiconductor storage device generally includes: firstly providing a semiconductor substrate, forming a gate array on the semiconductor substrate, and then performing cell source-drain implant (Cell SD Implant), and then performing a gate array on the gate array. forming a spacer, depositing a passivation layer to cover the gate array while isolating the gate structure, depositing an interlayer dielectric layer, and patterning the interlayer dielectric layer to form a source line (Source line ) and the pattern of the drain region contact hole, and then deposit an isolation layer, such as a glue layer (Glue layer), and finally deposit a conductive material layer and planarize to form a contact hole.

[0044]In this process, the control of the sidewall is very critical, and it is easy to cause breakdown from the word line (WL) to the contact hole of the drain region. Therefore, as the size of semiconductor devices continues to s...

Embodiment 1

[0046] Attached below Figures 1a-1j A specific embodiment of the present invention will be described.

[0047] First, step 201 is performed to provide a semiconductor substrate 101 on which a gate array formed by several gate structures is formed.

[0048] First, refer to Figure 1a , wherein the semiconductor substrate 101 can be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI) , silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), etc.

[0049] In addition, an active region may be defined on the semiconductor substrate 101 . Other active devices may also be included on the active area, which are not marked in the shown figures for convenience.

[0050] A gate dielectric layer is formed on the semiconductor substrate 101 , wherein the gate dielectric layer 102 may be a dielectric material commonly used in the field, for example, an oxide may be s...

Embodiment 2

[0100] The present invention also provides a semiconductor storage device, which is prepared by the method described in Embodiment 1. The sidewall of the gate structure in the semiconductor storage device prepared by the method is not damaged, and the surface thereof is smoother and more uniform, which not only improves the performance of the semiconductor device, but also greatly improves the yield rate of the device.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a semiconductor memory device, a preparation method thereof, and an electronic device. The method includes: step S1: providing a semiconductor substrate, on which a gate array formed of a plurality of gate structures is formed; S2: Perform source and drain implantation to form source and drain regions, and form a passivation layer on the source and drain regions to fill the gap between the gate structures; Step S3: Remove part of the gate structure by a self-alignment method. The passivation layer between the gate structures to form isolation openings and space the gate array; Step S4: Deposit an isolation material layer to fill the isolation openings; Step S5: Remove the passivation layer, Conductive material is then deposited to form contact holes between the gate structures. The method of the present invention can avoid damage to the sidewall of the gate, thereby further improving the performance and yield of the device.

Description

technical field [0001] The present invention relates to a semiconductor memory device, in particular, the present invention relates to a semiconductor memory device, a manufacturing method thereof, and an electronic device. Background technique [0002] With the rapid development of portable electronic devices (such as mobile phones, digital cameras, MP3 players, and PDAs, etc.), the requirements for data storage are getting higher and higher. Non-volatile flash memory has become the most important storage component in these devices due to its ability to save data even when power is off. Among them, because flash memory (flash memory) can achieve high chip storage density, and does not introduce new materials , The manufacturing process is compatible, therefore, it can be more easily and reliably integrated into own digital and analog circuits. [0003] NOR and NAND are two main non-volatile flash memory technologies on the market today. NOR flash memory (Flash) devices are...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11524H01L27/11529H01L27/11531H01L21/28H10B41/35H10B41/41H10B41/42H10B69/00
Inventor 杨芸
Owner SEMICON MFG INT (SHANGHAI) CORP