Semiconductor structure and formation method thereof

Abstract

The invention relates to a semiconductor structure and a formation method thereof. The formation method comprises the steps of providing a substrate, wherein the surface of the substrate is provided with a pseudo gate dielectric film, and the surface of the pseudo gate dielectric film is provided with a pseudo gate film; forming a mask layer at part of the surface of the pseudo gate film, carrying out a first etching process on the pseudo gate film by taking the mask layer as a mask so as to form a first trench in the pseudo gate film, wherein the side wall of the first trench is vertical with the surface of the substrate, carrying out a second etching process on the pseudo gate film at the bottom of the first trench until the surface of the pseudo dielectric film is exposed, forming a second trench at the bottom of the first trench, forming a pseudo gate layer adjacent to the left pseudo gate film between the first trench and the second trench, wherein the top of the second trench is less than the bottom of the second trench in size, and the angle between the side wall of the second trench and the bottom surface of the second trench is an acute angle, and carrying out a third etching process on the exposed pseudo gate dielectric film until the surface of the substrate is exposed so as to form a pseudo gate dielectric layer. The formed semiconductor structure is good in appearance and improved in performance.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the rapid development of integrated circuit manufacturing technology, the size of semiconductor devices in integrated circuits, especially MOS (Metal Oxide Semiconductor, metal-oxide-semiconductor) devices, is continuously reduced to meet the miniaturization and integration of integrated circuit development. Requirements, and transistor devices are one of the important components of MOS devices. [0003] For transistor devices, as the size of the transistor continues to shrink, the gate dielectric layer formed of silicon oxide or silicon oxynitride material in the prior art cannot meet the performance requirements of the transistor. In particular, transistors formed with silicon oxide or silicon oxynitride as the gate dielectric layer are prone to a series of problems s...

AI Technical Summary

Problems solved by technology

[0005] However, with the continuous shrinking of semiconductor process nodes, the size of the formed high-k metal gate transistors is continuously shrinking, which leads to an increase in the process difficulty of manufacturing high-k metal gate transistors, and the formed transistors have poor morphology and unstable performance.

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