Semiconductor package method, semiconductor package piece, and method for manufacturing dynamic random access memory

Abstract

The present invention provides a semiconductor package method which comprises a step of providing a memory wafer with the formation of a dynamic random access memory and a plurality of first silicon through hole connection pads, a step of providing a logic wafer with the formation of a logic chip and a plurality of second silicon through hole connection pads, and a step of electrically connecting the first silicon through hole connection pads and the second silicon through hole connection pads through a silicon through hole mode, and realizing the wafer level package of the memory wafer and the logic wafer. A super wide bus is directly connected to the silicon through hole connection pads on the metal layer of a surface, the electrical connection with an external logic wafer is realized through the silicon through hole technology, and the reading and writing bit width and reading and writing speed of the dynamic random access memory are extended.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a semiconductor packaging method, a semiconductor packaging component and a manufacturing method of a dynamic random access memory. Background technique [0002] Dynamic Random Access Memory (DRAM, Dynamic Random Access Memory) has the characteristics of large capacity, high speed, and low unit cost, so it is extremely versatile. After long-term development, DRAM has developed a variety of multi-generation products. For example, in the high-performance field, it has evolved from the first generation of DDR to the fifth-generation DDR5, and in low-power applications, it has evolved from LPDDR to LPDDR2. [0003] Such as figure 1 As shown, the current mainstream DRAM generally includes: a storage array 10, a control logic circuit 20 and an interface conversion logic circuit 30. The storage array 10 includes a large number of storage units for storing data, and occupies the largest ar...

AI Technical Summary

Problems solved by technology

However, this method needs to add additional semiconductor layers to make micro pads and butt pads, which increases the cost of DRAM production and packaging. In addition, the bonding structure accuracy and electrical performance reliability of the memory wafer and the second wafer butt pads There is also uncertainty

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