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Conducting cylinder, manufacturing method thereof, chip packaging method and flip chip product

A conductor post and chip technology, which is used in semiconductor/solid-state device manufacturing, semiconductor devices, and semiconductor/solid-state device components, etc. Failure and other problems, to achieve the effect of not easy to fail or circuit failure, excellent robustness, good uniformity and compactness

Active Publication Date: 2016-08-17
RICHVIEW ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, although these existing copper pillar flip-chip technologies can meet the requirements of small pitches, the bonding force of the metal seed layer at the junction between the copper pillar and the packaging substrate circuit, or between the copper pillar and the semiconductor chip electrode is weak and easy to Cracks are generated, and due to the stress caused by uneven thermal expansion during the packaging process, it is easy to cause electrode fracture, copper pillars and packaging substrates or chip electrodes to peel off, resulting in failure of electronic products

Method used

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  • Conducting cylinder, manufacturing method thereof, chip packaging method and flip chip product
  • Conducting cylinder, manufacturing method thereof, chip packaging method and flip chip product
  • Conducting cylinder, manufacturing method thereof, chip packaging method and flip chip product

Examples

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Effect test

no. 1 example

[0068] figure 2 It is a flowchart showing a method of manufacturing a conductor post according to the first embodiment of the present invention. The method involves forming a conductor post on the surface of the chip electrode, and includes the following steps: covering the periphery of the chip electrode with an insulating layer provided with a hole (step S11); performing the hole wall of the hole and the surface of the chip electrode exposed to the hole Ion implantation and / or plasma deposition treatment to form a conductive seed layer (step S12); cover the insulating layer with photoresist, and form openings in the photoresist that communicate with the holes by photolithography (step S21); The conductive material fills the holes and openings (step S22); and, the photoresist and the conductive seed layer underneath are removed to form a conductive pillar (step S23). Among them, steps S11 and S12 correspond to figure 1 Step S1 is shown, and steps S21, S22, and S23 correspond ...

no. 2 example

[0081] Image 6 It is a flowchart showing a method of manufacturing a conductor post according to the second embodiment of the present invention. The method involves forming a conductor post on the hole wall of a hole formed in a chip, and includes the following steps: drilling a through hole on a chip or two or more chips stacked together, and covering an insulating layer around the through hole ( Step S11); ion implantation and / or plasma deposition are performed on the wall of the through hole to form a conductive seed layer that penetrates a chip or two or more chips stacked together (step S12); conductive material is used Fill the via hole (step S21); and remove the insulating layer to form a conductor post (step S22). Among them, steps S11 and S12 correspond to figure 1 Step S1 is shown, while steps S21 and S22 correspond to figure 1 Shown in step S2. In addition, Figure 7(a)-(d) is a diagram showing the difference between Image 6 The corresponding structural cross-secti...

no. 3 example

[0087] Figure 8 It is a flowchart showing a method of manufacturing a conductor post according to the third embodiment of the present invention. The method involves forming conductor posts on the circuit surface of the packaging substrate, and includes the following steps: ion implantation and / or plasma deposition treatment is performed on the surface of the packaging substrate to form a conductive seed layer (step S1); on the packaging substrate Cover the photoresist, and form an opening in the photoresist by photolithography to expose the circuit surface of the package substrate (step S21); fill the opening with a conductive material (step S22); remove the photoresist and the conductive seed layer underneath, To form a conductor post (step S23). Among them, steps S21, S22 and S23 correspond to figure 1 Shown in step S2. In addition, Fig. 9(a)-(d) shows the difference between Figure 8 The corresponding structural cross-sectional schematic diagrams of each step of the method...

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Abstract

The invention relates to a conducting cylinder, a manufacturing method thereof, a chip packaging method and a flip chip product. The manufacturing method of the conducting cylinder comprises steps as follows: step S1), surface of a chip electrode, the wall of a hole formed in the chip or a circuit surface of a packaging substrate is subjected to ion implantation and / or plasma deposition treatment through a target material, and a conductive seed crystal layer is formed; step S2), a cylindrical conductor thickening layer is formed above the conductive seed crystal layer, and the conductor thickening layer and the conductive seed crystal layer constitute the conducting cylinder.

Description

Technical field [0001] The present invention relates to the field of chip packaging of electronic products, in particular to a conductor post and a manufacturing method thereof, a method for packaging a chip using a conductor post, and a chip flip-chip product manufactured by the packaging method. The conductor post is suitable for using electrodes on the chip It is electrically connected to a package substrate, such as a single-layer printed circuit board, a build-up multilayer substrate, or a buried circuit coreless board. Background technique [0002] With the development trend of electronic products towards high integration, miniaturization and thinning, corresponding printed circuit boards or integrated circuit packaging substrates are required to be lighter, thinner, shorter, and shorter while meeting good electrical and thermal performance. The trend of small development requires increased integration of electronic components, high packaging density, miniaturization and mu...

Claims

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Application Information

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IPC IPC(8): H01L23/488H01L21/60H01L21/265
CPCH01L21/265H01L24/10H01L24/11H01L24/12H01L2224/11H01L23/488
Inventor 张志强杨志刚王志建
Owner RICHVIEW ELECTRONICS CO LTD
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