Polysilicon emitter transistor manufacturing method
A manufacturing method and polysilicon technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of small emission area window size, poor high-frequency characteristics of transistors, and inability to obtain
Active Publication Date: 2018-12-07
FOUNDER MICROELECTRONICS INT
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[0004] The invention provides a method for manufacturing a polysilicon emitter transistor, which is used to solve the technical problem that the smaller window size of the emitter region cannot be obtained in the prior art, resulting in poor high-frequency characteristics of the transistor
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[0025] Taking NPN transistors as an example, the manufacturing method of polysilicon emitter transistors generally includes: growing an oxide layer 1 on the surface of an N-type substrate, and growing silicon nitride on the surface of the oxide layer 2; using photolithography and etching process to remove silicon nitride in the field area; then use thermal oxidation process to generate oxide layer 2 on the surface of the N-type substrate in the field area, and then use hot phosphoric acid to remove silicon nitride in the active area; use photolithography process and ion implantation process A first P-type ion implantation doped region and a second P-type ion implantation doped region with different ion implantation doses are formed on the surface of the N-type substrate in the active region; layer 3, and perform heat treatment, so that the first P-type ion implantation doped region and the second P-type ion implantation doped region are converted into P-type diffusion region 1 ...
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The invention provides a manufacturing method of a polysilicon emitter transistor. After a local oxidation technology is adopted to oxidize the peripheral region of a first oxide layer and obtain a second oxide layer, the first oxide layer is removed, and a third oxide layer is grown on the surface of the substrate removing the first oxide layer; in a first preset region and a second preset region, ion implantation is carried out on the substrate having the third oxide layer to obtain a first ion implantation doped region and a second ion implantation doped region, thereafter, the third oxide layer is removed, and a fourth oxide layer covering the first ion implantation doped region and the second ion implantation doped region is grown on the surface of the substrate removing the third oxide layer; and finally, etching is carried out on the surface of the fourth oxide layer, and an emitter region window penetrating through the fourth oxide layer is obtained. According to invention, the manufacturing method of the polysilicon emitter transistor solves the problems in the prior art that the size of the emitter region window cannot be reduced, the characteristic frequency of the transistor cannot be increased, and the high frequency characteristic is poor.
Description
technical field [0001] The invention relates to semiconductor manufacturing technology, in particular to a method for manufacturing polysilicon emitter transistors. Background technique [0002] Bipolar transistors include an emitter region, a base region, and a collector region in structure, and bipolar transistors can be further divided into NPN transistors and PNP transistors according to the conductivity type. Taking an NPN transistor as an example, the emitter and collector regions are N-type semiconductors, and the base region is P-type semiconductors. If the N-type semiconductor in the emitter area is N-type doped polysilicon, it is called a polysilicon emitter transistor, which is often used in high-frequency fields. Figure 1A is a schematic diagram of the structure of a polysilicon emitter transistor, such as Figure 1A As shown, it includes the N-type substrate as the collector region of the transistor, the P-type base region, and the emitter region composed of N-...
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IPC IPC(8): H01L21/331H01L21/265
Inventor 潘光燃文燕高振杰王焜石金成
Owner FOUNDER MICROELECTRONICS INT