Fabrication method of enhanced N-type MOS (Metal Oxide Semiconductor) transistor with protruding grid substrate

Abstract

The invention discloses a fabrication method of an enhanced N-type (Metal Oxide Semiconductor) transistor with a protruding grid substrate. The fabrication method comprises the following steps of 1, performing boron ion injection process on a wafer to form a P-type doping silicon substrate; 2, performing a shallow groove isolation process; 3, performing an etching process of a protruding part of the grid substrate; growing a layer of P-type doping silicon on the structure obtained in the step 2, wherein the height of the silicon is equal to the height of the protruding part of the grid substrate; 4, covering the grid substrate part by photoresist; 5, etching a part outside the photoresist by an etching technology, growing a poly-silicon grid, and forming a side wall; and 6, performing a source / drain injection process. In the growth structure, the substrate of a grid upwards protrudes, and the on / off of a circuit can be controlled at two sides of the circuit. By such a design, circuit control can be substantially improved, leakage is reduced, and the brake length of the transistor can be substantially shortened.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a method for manufacturing an N-type MOS transistor with a raised gate substrate. Background technique [0002] In the prior art, the size of the MOS transistor is getting smaller and smaller. If the size of the enhanced N-type MOS transistor is too small, the gate control current of the transistor is also very small, which is not easy to adjust, and the control accuracy is poor. Contents of the invention [0003] Aiming at the deficiencies of the prior art, the invention discloses a method for manufacturing an N-type MOS transistor with a raised gate substrate. [0004] Technical scheme of the present invention is as follows: [0005] A method for manufacturing an N-type MOS tube with an enhanced gate substrate protrusion, comprising the following steps: [0006] Step 1, performing boron ion implantation on the wafer to form a P-type doped silicon substrate; ...

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Problems solved by technology

[0002] In the prior art, the size of the MOS transistor is getting smaller and smaller. If the size of the enhanced N-type MOS transistor is too small, the gate control current of the transistor is also very small, which is not easy to adjust, and the control accuracy is very poor.

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