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Semiconductor device and manufacturing method thereof and electronic device

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as chip damage, achieve the effect of enhancing strength and overcoming passivation layer damage

Active Publication Date: 2017-07-21
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Aiming at the deficiencies of the prior art, the present invention proposes a semiconductor device and its manufacturing method and electronic device, which can prevent the problem of chip damage caused by deformation stress in the chip packaging quality test

Method used

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  • Semiconductor device and manufacturing method thereof and electronic device
  • Semiconductor device and manufacturing method thereof and electronic device
  • Semiconductor device and manufacturing method thereof and electronic device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0052] Below, refer to Figure 10 A method for manufacturing a semiconductor device according to an embodiment of the present invention will be specifically described. in, Figure 10 It is a flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

[0053] The method for manufacturing a semiconductor device according to Embodiment 1 of the present invention includes the following steps:

[0054] In step S101, the direction distribution of the stress on the bumps on the semiconductor device during the semiconductor device packaging quality test is obtained through testing.

[0055] Step S102 , based on the obtained distribution of stress on the bumps on the semiconductor device, determine the distribution direction of each bump so that the extension direction of the minor axis of each bump is perpendicular to the direction of the stress.

[0056] Step S103, according to the determined distribution direction of each b...

Embodiment 2

[0063] Another embodiment of the present invention provides a semiconductor device, which can be prepared by the above-mentioned method.

[0064] The semiconductor device according to the embodiment of the present invention includes a semiconductor wafer, on which bumps are formed for connection with a packaging substrate, wherein at least a part of the bumps have an elliptical cross-section, and the cross-section is an elliptical The extension direction of the minor axis of the bump is perpendicular to the direction of the stress on the bump during the packaging quality test of the semiconductor device.

[0065] Preferably, cross-sections of all the bumps formed on the semiconductor wafer are oval.

[0066] Preferably, the bumps with an elliptical cross-section are located in a region with a low bump density on the semiconductor wafer.

[0067] Preferably, the semiconductor device in this embodiment further includes: a packaging substrate, on which solder joints correspondin...

Embodiment 3

[0072] Still another embodiment of the present invention provides an electronic device, including a semiconductor device and an electronic component connected to the semiconductor device. Wherein, the semiconductor device is a semiconductor device manufactured according to the above-mentioned method for manufacturing a semiconductor device, or is a semiconductor device as described above.

[0073] Wherein, the electronic component may be any electronic component such as a discrete device or an integrated circuit.

[0074] The electronic device of this embodiment can be any electronic product or equipment such as mobile phone, tablet computer, notebook computer, netbook, game console, TV set, VCD, DVD, navigator, camera, video recorder, voice recorder, MP3, MP4, PSP, etc. , can also be any intermediate product including the semiconductor device.

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Abstract

The invention provides a semiconductor device and a manufacturing method thereof and an electronic device, and relates to the technical field of semiconductors. The method includes the following steps: providing a semiconductor wafer, forming bumps on the semiconductor wafer which are used for being connected with a packaging substrate, wherein cross sections of at least part of the bumps are elliptical, and the short axis extending direction of the bumps whose cross sections are elliptical is roughly vertical to the direction of the stress of the bumps in a semiconductor device packaging quality test. According to the manufacturing method of the semiconductor device, the short axis extending direction of all the bumps is vertical to the stress direction, so that the strength of all the bumps can be enhanced, thereby effectively overcoming the problems of passivation layer damage and the like that occur in a packaging chip quality test. The electronic device includes the abovementioned semiconductor device, and also has the abovementioned advantage.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a semiconductor device, a manufacturing method thereof, and an electronic device. Background technique [0002] In the package interconnection of integrated circuits, the connection of semiconductor devices (eg, chips) and package substrates (eg, leadframes) provides circuit connections for distribution of power and signals. Common connection methods for electronic packaging include wire bonding (Wire Bonding, WB), tape carrier automatic welding (TAPE Automated Bonding TAB) and flip chip (Flip chip, FC). The flip-chip bump structure has become a commonly used packaging technology due to its high mounting density of semiconductor devices. Such as figure 1 As shown, in the flip-chip bump structure, a bump 101, such as a copper pillar, is formed on the chip 100, and the connection between the chip 100 and the substrate 102 can be realized by connecting the bump to a...

Claims

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Application Information

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IPC IPC(8): H01L21/48H01L21/60H01L23/488
CPCH01L21/4825H01L23/488H01L24/14H01L2224/141H01L2224/16225H01L2924/15311H01L2924/3511
Inventor 殷原梓
Owner SEMICON MFG INT (SHANGHAI) CORP
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