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Delta modulator and analog-to-digital converter thereof

A technology of delta modulator and analog-to-digital converter, which is applied in the field of delta modulator based on successive approximation analog-to-digital converter, can solve the problems of high amplifier consumption, high total power consumption, and limitation of the use of delta modulator, etc., to achieve Effects of area reduction and power consumption reduction

Active Publication Date: 2017-07-28
SHENZHEN GRADUATE SCHOOL TSINGHUA UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The amplifier needs to consume high energy, and the DAC needs an additional reference circuit, and the total power consumption is very high
In addition, more modules will inevitably increase the chip area, which limits the use of delta modulators in low-power applications.

Method used

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  • Delta modulator and analog-to-digital converter thereof
  • Delta modulator and analog-to-digital converter thereof
  • Delta modulator and analog-to-digital converter thereof

Examples

Experimental program
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Effect test

example 1

[0040] This embodiment provides a Δ modulator, including an input terminal, a conversion module, a control module, an accumulation module and an output terminal, wherein the conversion module is a monotonic capacitive switching successive approximation analog-to-digital converter (SAR ADC), and its structural diagram is as follows Figure 3a As shown, it includes: two sets of capacitor arrays with n+1 capacitors, two sets of n reverse switches, comparators and successive approximation logic control units. The control module includes: two sets of data selectors and two sets of control logic units; the control module is set on the path from the successive approximation analog-to-digital converter to the output terminal, and the data selector selects the successive approximation logic control under the control of a certain control logic unit A set of data from the unit output and the digital integrator output is sent to the inverting switch. The accumulation module is a digital d...

example 2

[0050] Such as Figure 4a shown in Figure 3a On the basis of the shown Δ modulator, a decoding circuit is added, and the number of capacitor array capacitors and the number of reverse switches in the converter are reduced by one, so that the area of ​​the capacitor array is reduced by 50%, and the power consumption is also reduced by 50%. Its working process is still as Figure 5 As shown, it takes n+3 cycles to complete a conversion. The difference from mode 1 is that in period n+3, when the high bit L[n] of output signal 2 is '1', Figure 5 The implementation method (hereinafter referred to as mode 2), the upper group of data selectors selects L[n:1], and the lower group of data selectors selects logic signal '1'; when L[n] is '0' , the upper group of data selectors selects the logic signal '1', and the lower group of data selectors selects the complement of the output signal 2 (set as LC[n:1]). The upper plate of the cycle 1 capacitor array is connected to the analog i...

Embodiment 1

[0055] The working process of the delta modulators in Embodiment 1 and Embodiment 2 is divided into a sampling stage, a subtraction (subtraction) stage, a conversion (quantization) stage and an accumulation stage. There are two ways of working in the conversion stage: one is that under Nyquist sampling, SARADC starts to convert from the corresponding high-level capacitor; the other is that under a certain oversampling rate, SAR ADC can skip the high-level capacitor according to the oversampling rate . For example, when there is 8 times oversampling, it can be obtained from Figure 3a , Figure 3b with Figure 3c Cn-1 starts converting from Figure 4a , Figure 4b with Figure 4c Cn-2 starts conversion, which reduces a cycle and improves the conversion speed.

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Abstract

The invention discloses a delta modulator, comprising an input module, a conversion module, a control module, an accumulation module and an output module, wherein the input module is used for inputting a first analog signal; the conversion module is connected with the input module, is used for converting the last data result to a second analog signal, is also used for calculating the difference value between the first analog signal and the second analog signal, and is also used for converting the difference value to a digital signal; the control module is connected with the conversion module and is used for controlling the conversion or calculation of the conversion module; the accumulation module is connected with the conversion module and is used for accumulating the digital signals to obtain a final data result; the output module is connected with the conversion module and the accumulation module and is used for outputting the digital signals and the final data result; and the functions of quantization, subtraction and digital-to-analog conversion can be achieved through the control module and the multiplexing conversion module. According to the delta modulator disclosed by the invention, the conversion or calculation mode of the conversion module is controlled by the control module; and through function multiplexing, the power consumption can be lowered, and the area can also be reduced.

Description

technical field [0001] The present invention relates to delta (Δ) modulators, and more particularly to a delta (Δ) modulator based on a successive approximation analog-to-digital converter (SARADC). Background technique [0002] The existing Δ modulator includes an analog input terminal, a subtraction module, a quantization module, an accumulation module, a digital-to-analog conversion module and a digital output terminal, and its structure diagram is as follows figure 1 As shown, the Δ modulator can obtain two digital outputs as shown in the figure, which respectively correspond to the difference of the analog input at adjacent moments and the analog input itself. The subtraction module is generally implemented with an operational amplifier with feedback; the quantization module is implemented with an analog-to-digital converter (ADC); and the digital-to-analog conversion module can use a digital-to-analog converter (DAC) such as a current steering and charge redistribution...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M3/00H03M1/00H03M1/46
CPCH03M1/002H03M1/466H03M3/412
Inventor 冯海刚于宝亮
Owner SHENZHEN GRADUATE SCHOOL TSINGHUA UNIV
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