Adjustable power consumption low dropout linear regulator which integrates undervoltage locking function

Abstract

The invention provides a design method in which low dropout linear regulator LDO (Low Dropout Linear Regulator) module indispensable in a common power source management chip and an undervoltage locking module are integrated into the same module, and the LDO is optimized in power consumption, so that a new integrated module is small in circuit area and low in power consumption. The LDO module can provide stable and reliable power source for an analog or digital part in the chip, and effectively prevent mutual interference between an analog signal and a digital signal. The undervoltage locking module can control a post circuit to be closed when power source voltage is lowered and power supply is not sufficient, and guarantees stable work of the circuit. Hysteresis is introduced in the undervoltage locking module, and therefore, and the situation is prevented that when a Vin is located in a critical state, the undervoltage locking module is repeatedly opened and closed, which makes the circuit enter an unstable state. The LDO and undervoltage locking are subjected to integrated design, the power consumption of the LDO is optimized when a power source chip enters a sleep state, the work effect of the LDO and undervoltage locking is achieved, moreover, the occupied chip area is smaller, and the power consumption is low.

Description

technical field [0001] The invention relates to the technical field of analog integrated circuits, in particular to a power consumption adjustable linear voltage regulator integrated with an undervoltage lockout function. Background technique [0002] In recent years, with the popularity of portable electronic devices, the demand for power management chips is also increasing. In the power management chip, in order to ensure the stability and reliability of the system power supply, it is necessary to use a low dropout linear regulator LDO (Low Dropout Linear Regulator) to generate a new power signal to supply power to the subsequent circuit; at the same time, it is also for the stability of the circuit Considering that, when the power supply voltage is lower than our required threshold, an enable control signal is required to shut down the subsequent stage circuit, so that the circuit will not enter an unstable state of logic chaos. It can be said that these two modules are ...

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Problems solved by technology

Although it is relatively simple to design modules separately, it is inevitable that the chip area will be larger. In today's chip miniaturization, it is necessary to minimize the circuit area during the design process.

On the other hand, there is no optimal control of power consumption

When the common power management chip is in the light load mode, the circuit will intermittently enter the sleep state. At this time, a large number of modules in the chip will suspend work, and some modules will continue to work, so the LDO cannot be turned off when the circuit enters the sleep state. , it is still necessary to supply power to part of the subsequent stage circuit, but at this time, the requirements of the latter stage circuit on the load capacity of the previous stage power supply will be greatly reduced, but if figure 2 The traditional LDO shown cannot control the size of the tail current when the circuit is in a sleep state, which will waste a large part of energy and increase power consumption

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