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Manufacture method of PIN photodiode

A technology for photodiodes and manufacturing methods, which is applied in the manufacture of circuits, electrical components, semiconductors/solid-state devices, etc., can solve the problems of PIN photodiode performance degradation, affecting the light transmittance of the P-region oxide layer, etc., and achieve good light transmittance , the effect of improving performance

Active Publication Date: 2017-11-14
FOUNDER MICROELECTRONICS INT
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  • Claims
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Problems solved by technology

[0004] During the etching process of the metal layer, no matter the damage to the P-region oxide layer or the residual silicon slag on the surface of the P-region oxide layer will affect the light transmittance of the P-region oxide layer, resulting in a decrease in the performance of the PIN photodiode

Method used

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  • Manufacture method of PIN photodiode
  • Manufacture method of PIN photodiode
  • Manufacture method of PIN photodiode

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Embodiment Construction

[0031] figure 1 The flow chart of the manufacturing method of the PIN photodiode provided by the embodiment of the present invention. In order to clearly and systematically describe the method in this embodiment Figure 2-Figure 13 A schematic cross-sectional view of a PIN photodiode during the implementation of the method of the embodiment of the present invention, such as figure 1 As shown, the method steps include:

[0032] Step S101, growing a first oxide layer on the upper surface of the silicon substrate;

[0033] growing a first oxide layer on the surface of the silicon substrate, specifically, the growth temperature of the first oxide layer is 900-1200° C., the thickness of the first oxide layer is in the range of 0.1-1.0 um, and performing the steps The cross-sectional schematic diagram of the PIN photodiode after S101 is as follows figure 2 Shown, wherein, the silicon substrate is represented by 21, and the first oxide layer is represented by 22.

[0034] Step ...

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Abstract

The embodiments of the present invention provide a manufacture method of a PIN photodiode. The method includes the following steps that: the upper surfaces of a third oxide layer, a first oxide layer, a contact hole and a second oxide layer are coated with first negative photoresist, exposure and development are performed on the exposure area of the first negative photoresist, the first negative photoresist in a non-exposure area is removed, and therefore, a plurality of sections of second negative photoresist which are separated from one another can be formed; and the lateral width of each section of second negative photoresist is within a preset width range, and the contact hole is located between two sections of second negative photoresist, and a distance between the two sections of second negative photoresists is greater than the aperture of the contact hole. According to the method provided by the embodiments of the present invention, a metal layer is removed through two steps; according to the first step, the second negative photoresist is removed through adopting a stripping solution, so that the metal layer can be removed; according to the second step, a mixed solution is adopted to etch an titanium layer, so that an aluminum silicon copper layer on the titanium layer can be removed; the second oxide layer, namely an oxide layer on a P- region, is intact after the treatment of the two steps is performed, and the light transmittance of the oxide layer of the P- region is good, and the performance of the PIN photodiode can be improved.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductors, in particular to a method for manufacturing a PIN photodiode. Background technique [0002] In the prior art, the manufacturing process of the PIN photodiode includes the etching of the metal layer, the composition of the metal layer includes aluminum (98.5%), silicon (1%) and copper (0.5%), and the P-region is below the metal layer oxide layer. [0003] The etching of the metal layer includes dry etching and wet etching. If dry etching is used, it will cause etching damage to the P-region oxide layer; if wet etching is used, it will be damaged after etching. The residual silicon slag on the upper surface of the P-region oxide layer needs to be further removed. The residual silicon slag on the upper surface of the P-region oxide layer will be damaged during the removal process. If the removal is not clean, there will be Silicon dross remains on the surface of the P-region oxi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L31/18H01L21/3213
CPCH01L21/32134H01L21/32139H01L31/1804
Inventor 马万里
Owner FOUNDER MICROELECTRONICS INT
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