Method for manufacturing P-type MOSFET

Abstract

The invention discloses a method for manufacturing a P-type MOSFET. The method comprises: forming a portion of the P-type MOSFET on a substrate, the portion comprising a dummy gate stack over the substrate and a gate sidewall surrounding the dummy gate stack layer; removing the dummy gate stack layer to form a gate opening; forming an interface oxide layer, a high-K gate dielectric layer, and a first metal gate layer successively at the gate opening; doping the first metal gate layer with ions by using isotropic plasma so that the doped ions are only distributed in the first metal gate layer;forming a second metal gate layer on the first metal gate layer to fill the gate opening; and performing an annealing process to diffuse and accumulate the doped ions at a upper interface between thehigh-K gate dielectric layer and the first metal gate layer and a lower interface between the high-K gate dielectric layer and the interface oxide layer, and forming electric dipoles at the upper interface and at the lower interface by means of interface reaction. The method solves an ion implantation shadow effect and energy pollution during small energy injection.

Description

technical field [0001] The disclosure belongs to the technical field of semiconductors, and relates to a method for manufacturing a P-type MOSFET. Background technique [0002] With the development of semiconductor technology, the feature size of Metal Oxide Semiconductor Field Effect Transistor (MOSFET) keeps decreasing. The shrinking of MOSFET size leads to serious short channel effect, the leakage current increases sharply, and the driving current decreases. The use of high-K gate dielectric makes it possible to increase the physical thickness of the gate dielectric while keeping the equivalent oxide thickness (EOT) constant, thus reducing the gate tunneling leakage current, and the reduction of EOT can increase the driving current . However, conventional polysilicon gates are not compatible with high-K gate dielectrics. The use of metal gates and high-K gate dielectrics can not only avoid the depletion effect of polysilicon gates, reduce gate resistance, but also avoi...

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Problems solved by technology

However, it is difficult to achieve such a low effective work function only by the choice of materials

In the prior art, the threshold voltage of the MOSFET is adjusted by doping the first metal gate layer by means of ion implantation and adjusting the distribution of dopant ions in the gate stack through the subsequent annealing process. The method of ion implantation has its inherent disadvantages, including: the shadow effect of ion implantation; the problem of energy pollution and low production efficiency during low energy implantation

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