Manufacturing method of N-type MOSFET

Abstract

The invention discloses a manufacturing method of an N-type MOSFET. The manufacturing method comprises the steps of forming a part of the N-type MOSFET on a substrate, wherein the part comprises a dummy gate stack arranged above the substrate and a gate side wall configured to surround the dummy gate stack; removing the dummy gate stack to form a gate opening; sequentially forming an interface oxide layer, a high-k gate dielectric layer and a first metal gate layer at the gate opening; doping ions in the first metal gate layer through the isotropic plasma doping process, and only distributingdoped ions in the first metal gate layer; forming a second metal gate layer on the first metal gate layer so as to fill the gate opening; performing annealing treatment to enable the doped ions to diffuse and accumulate on an upper interface between the high-k gate dielectric layer and the first metal gate layer and at a lower interface between the high-k gate dielectric layer and the interface oxide layer, and forming electric dipoles at the upper interface and at the lower interface through the interface reaction process. According to the method, the problems of ion implantation shadow effect, small energy injection energy pollution and the like are solved.

Description

Technical field [0001] The present disclosure belongs to the field of semiconductor technology, and relates to a manufacturing method of an N-type MOSFET. Background technique [0002] With the development of semiconductor technology, the feature size of metal oxide semiconductor field effect transistors (MOSFETs) has been continuously reduced. The size reduction of MOSFET leads to severe short channel effect, the leakage current increases sharply, and the drive current decreases. The use of high-K gate dielectric makes it possible to increase the physical thickness of the gate dielectric while keeping the equivalent oxide thickness (EOT) unchanged, thus reducing the gate tunneling leakage current, and at the same time, the reduction of EOT can increase the driving current . However, traditional polysilicon gates are not compatible with high-K gate dielectrics. The use of a metal gate and a high-K gate dielectric can not only avoid the depletion effect of the polysilicon gate,...

AI Technical Summary

Problems solved by technology

However, it is difficult to achieve such a low effective work function only by the choice of materials

In the prior art, the threshold voltage of the MOSFET is adjusted by doping the first metal gate layer by means of ion implantation and adjusting the distribution of dopant ions in the gate stack through the subsequent annealing process. The method of ion implantation has its inherent disadvantages, including: the shadow effect of ion implantation; the problem of energy pollution and low production efficiency during low energy implantation

Images