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ads-b chip based on soc_fpga

An ADS-B, chip technology, applied in the architecture, instrument, computer and other directions with a single central processing unit, can solve the problems of limited effect and product miniaturization that cannot meet the requirements of general aviation aircraft, etc., to save system cost and reduce volume effect on design complexity, improved performance and reliability

Active Publication Date: 2021-07-09
CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
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  • Summary
  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

Although the miniaturization of the ADS-B system can be achieved through compact structure layout and appropriate integrated circuit synthesis technology, the effect of this method is limited. Even if the cost factor is not considered, it is completely dependent on high-performance small package components. It is also unable to meet the installation requirements of general aviation aircraft, especially the rapid development of unmanned aerial vehicles.

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  • ads-b chip based on soc_fpga
  • ads-b chip based on soc_fpga
  • ads-b chip based on soc_fpga

Examples

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Embodiment 1

[0035] The ADS-B chip architecture based on SoC_FPGA proposed in this embodiment, the overall architecture is as follows figure 1As shown, it mainly includes three parts: a hard processor system (hard processor system, HPS for short), a high-performance bus architecture, and an FPGA logic block. HPS is mainly used to implement forward analysis and reverse coding of ADS-B raw data, including DSP hard-core processors and matching ROM, RAM, external interfaces and other modules; the bus architecture is used to connect various modules inside the chip, including AXI bus, LW HPS2FPGA bridge and FPGA2HPS bridge; FPGA logic block is mainly used for digital logic development, the core content is to use the programmable logic in the FPGA architecture, RAM module, WiFi module, etc. to realize flight situation information collection, reception, transmission, data Flow control, signal codec and other functions.

[0036] HPS(hard processor system) part

[0037] DSP hard-core processor: It...

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Abstract

An ADS-B chip based on SoC_FPGA of the present invention includes a hard-core processor system, a bus architecture and an FPGA logic block. When working in the ADS-B IN state, the FPGA logic block performs signal decoding on the 1090ES detection signal to generate an ADS-B B raw data; the hard-core processor system accesses the ADS-B raw data through the bus architecture, generates the flight situation information of the surrounding aircraft and outputs it to the external monitoring terminal; when working in the ADS-B OUT state, the FPGA logic block receives the flight of the aircraft Situation information and access to ADS-B raw data through the bus architecture to form ADS-B message messages suitable for 1090ES data link transmission. The hard-core processor system accesses the flight situation information of the aircraft through the bus architecture to generate ADS-B raw data . The invention effectively reduces the volume of the ADS-B system and reduces the complexity of the system.

Description

technical field [0001] The invention relates to an integrated circuit technology in the field of aviation technology, in particular to an architecture design of an ADS-B system-level SOC (System of Chip) chip based on an FPGA core. Background technique [0002] Traditional portable ADS-B terminal systems often consist of a series of discrete devices such as central processing modules (including GNSS modules, signal processing modules, S-mode and ADS-B protocol processing modules, etc.), transmitting modules, receiving modules, and power modules. The central processing module composes the navigation information of the machine into ADS-B information and sends it to the transmitting module for external transmission, and completes the ADS-B OUT function; decodes and analyzes the ADS-B information sent by the receiving module, and converts the resolved ADS -B information and the navigation information of the machine are output to the back-end device to complete the ADS-B IN funct...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/78
CPCG06F15/7807
Inventor 刘刚张锋烽徐丁海葛成
Owner CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST