ads-b chip based on soc_fpga
An ADS-B, chip technology, applied in the architecture, instrument, computer and other directions with a single central processing unit, can solve the problems of limited effect and product miniaturization that cannot meet the requirements of general aviation aircraft, etc., to save system cost and reduce volume effect on design complexity, improved performance and reliability
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[0035] The ADS-B chip architecture based on SoC_FPGA proposed in this embodiment, the overall architecture is as follows figure 1As shown, it mainly includes three parts: a hard processor system (hard processor system, HPS for short), a high-performance bus architecture, and an FPGA logic block. HPS is mainly used to implement forward analysis and reverse coding of ADS-B raw data, including DSP hard-core processors and matching ROM, RAM, external interfaces and other modules; the bus architecture is used to connect various modules inside the chip, including AXI bus, LW HPS2FPGA bridge and FPGA2HPS bridge; FPGA logic block is mainly used for digital logic development, the core content is to use the programmable logic in the FPGA architecture, RAM module, WiFi module, etc. to realize flight situation information collection, reception, transmission, data Flow control, signal codec and other functions.
[0036] HPS(hard processor system) part
[0037] DSP hard-core processor: It...
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