Semiconductor memory device structure and manufacturing method thereof

Abstract

The invention provides a semiconductor memory device structure and a manufacturing method thereof. The memory device structure comprises a semiconductor substrate, word line structures and contact structures, wherein the semiconductor substrate comprises an active area and a groove isolation structure, the word line structures are formed in the semiconductor substrate and crossed with the active area, a long end tail part is arranged at one end of any word line structure, a short end tail part is arranged at the other end of the word line structure, the long end tail parts and the short end tail parts of adjacent two word line structures are arranged in a staggering manner, and the contact structures are formed at the long end tail parts of the word line structures so that electric lead-out of the word line structure can be realized. According to the semiconductor memory device structure and the manufacturing method thereof, mask design is performed to word line grooves, the word linestructures with the tail parts arranged in a long and short staggering manner are prepared, the occupied areas of the whole regions of the contact structures are not required to be increased, the manufacturing windows of the contact structures can be increased, and the short circuit of adjacent word line structures due to the contact structures is avoided. The tail parts of the word line structures are not required to be bent, the technology complexity is reduced, and the locating difficulty of the contact structures is reduced.

Description

technical field [0001] The invention belongs to the field of semiconductor design and manufacture, and in particular relates to a semiconductor storage device structure and a manufacturing method thereof. Background technique [0002] Dynamic Random Access Memory (DRAM for short) is a semiconductor storage device commonly used in computers, and is composed of many repeated storage units. Each memory cell generally includes a capacitor 10 and a transistor 11; the gate of the transistor 11 is connected to the word line 13, the drain is connected to the bit line 12, and the source is connected to the capacitor 10; the voltage signal on the word line 13 can control the transistor 11 Open or close, and then read the data information stored in the capacitor 10 through the bit line 12, or write the data information into the capacitor 10 through the bit line 12 for storage, such as figure 1 shown. [0003] Such as Figure 4 As shown, the word line (Word line) pattern is usually p...

AI Technical Summary

Problems solved by technology

[0009] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a semiconductor storage device structure and a manufacturing method thereof, which a

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