A kind of preparation method of the black silicon cell of rie texture

Abstract

The invention relates to an RIE texturing-based preparation method of a black silicon battery. The method comprises the following steps that: step S1, a damage layer on the front surface of a black silicon wafer is removed, and the back surface of the black silicon wafer is polished; step S2, phosphorus source diffusion is performed on the surface of the black silicon wafer, so that a PN junctioncan be prepared; step S3, the black silicon wafer is cleaned, RIE texturing is performed on the cleaned black silicon wafer, and a nano texturized surface is formed on the front surface of the black silicon wafer; step S4, the nano texturized surface of the black silicon wafer is repaired, so that a loss layer during the formation of the nano texturized surface can be removed; step S5, an antireflection film is deposited on the front surface of the black silicon wafer; and step S6, the back surface of the black silicon wafer is printed with back silver and aluminum paste, drying is performed,then the front surface of the black silicon wafer is printed with front silver, sintering is performed, and the black silicon battery can be obtained.

Description

technical field [0001] The invention belongs to the technical field of solar cells, in particular to a method for preparing a black silicon cell made of RIE texture. Background technique [0002] The preparation process of the black silicon battery in the prior art is to carry out acid texturing, RIE texturing, PN junction diffusion after the texturing repair, and then post-cleaning to remove the phosphosilicate glass layer (PSG) and edge etching, PECVD deposition Anti-reflection film, screen printing and sintering process to complete the preparation of black silicon cells, such as figure 1 shown. [0003] Using the above-mentioned process flow, after RIE texturing, a small textured surface with a depth of about 200-500nm will be formed on the surface of the black silicon wafer, and this depth is equivalent to the current diffusion PN junction depth. In the case of this textured texture, it will affect the diffusion depth of the PN junction, and the acid textured process w...

AI Technical Summary

Problems solved by technology

In the case of this textured texture, it will affect the diffusion depth of the PN junction, and the acid textured process will also cause the surface of the silicon wafer to be uneven, which further aggravates the inhomogeneity of the PN junction. As a result, the local diffusion concentration changes with the ups and downs of the suede surface, which increases the surface recombination rate of photogenerated carriers, thereby affecting the performance of the cell

[0004] Although the processes in the prior art (such as patents CN201510003710.4 and CN201520004215.0) also mention the back polishing technology, which improves the flatness of the silicon wafer surface before diffusion, thereby improving the performance of black silicon cells, these processes still use It is an existing commonly used process, which still does not take into account the influence of the suede size on the uniformity of diffusion. Therefore, the improvement of battery efficiency is limited.

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